CY62256V-55RZC CYPRESS [Cypress Semiconductor], CY62256V-55RZC Datasheet - Page 8

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CY62256V-55RZC

Manufacturer Part Number
CY62256V-55RZC
Description
32K x 8 Static RAM
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Document #: 38-05057 Rev. *D
Switching Waveforms
Notes:
14. Address valid prior to or coincident with CE transition LOW.
15. Data I/O is high impedance if OE = V
16. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
17. During this period, the I/Os are in output state and input signals should not be applied.
Write Cycle No. 2 (CE Controlled)
Write Cycle No. 3 (WE Controlled, OE LOW)
ADDRESS
ADDRESS
DATA I/O
DATA I/O
CE
WE
CE
WE
t
(continued)
SA
NOTE 17
IH
.
t
[10, 15, 16]
HZWE
t
SA
[11, 16]
t
t
AW
AW
t
WC
t
WC
DATA
DATA
t
SCE
t
SD
t
SD
IN
IN
VALID
VALID
t
HD
t
t
HA
LZWE
t
HA
t
HD
CY62256V
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