M95320-BN1T STMICROELECTRONICS [STMicroelectronics], M95320-BN1T Datasheet - Page 12
M95320-BN1T
Manufacturer Part Number
M95320-BN1T
Description
64/32/16/8 Kbit Serial SPI Bus EEPROM With High Speed Clock
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.M95320-BN1T.pdf
(39 pages)
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M95640, M95320
INSTRUCTIONS
Each instruction starts with a single-byte code, as
summarized in Table 4.
If an invalid instruction is sent (one not contained
in Table 4), the device automatically deselects it-
self.
Figure 9. Write Enable (WREN) Sequence
Write Enable (WREN)
The Write Enable Latch (WEL) bit must be set pri-
or to each WRITE and WRSR instruction. The only
way to do this is to send a Write Enable instruction
to the device.
12/39
S
C
D
Q
High Impedance
0
1
2
Instruction
3
4
Table 4. Instruction Set
As shown in Figure 9, to send this instruction to the
device, Chip Select (S) is driven Low, and the bits
of the instruction byte are shifted in, on Serial Data
Input (D). The device then enters a wait state. It
waits for a the device to be deselected, by Chip
Select (S) being driven High.
WREN
WRDI
RDSR
WRSR
READ
WRITE
Instruc
5
tion
6
7
Write Enable
Write Disable
Read Status Register
Write Status Register
Read from Memory Array
Write to Memory Array
AI02281E
Description
Instruction
0000 0110
0000 0100
0000 0101
0000 0001
0000 0011
0000 0010
Format
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