24LC21-IP MICROCHIP [Microchip Technology], 24LC21-IP Datasheet - Page 6

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24LC21-IP

Manufacturer Part Number
24LC21-IP
Description
1K 2.5V Dual Mode I 2 C Serial EEPROM
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
24LC21
3.1.4
The state of the data line represents valid data when,
after a START condition, the data line is stable for the
duration of the HIGH period of the clock signal.
The data on the line must be changed during the LOW
period of the clock signal. There is one clock pulse per
bit of data.
Each data transfer is initiated with a START condition
and terminated with a STOP condition. The number of
the data bytes transferred between the START and
STOP conditions is determined by the master device
and is theoretically unlimited, although only the last
eight will be stored when doing a write operation. When
an overwrite does occur it will replace data in a first in
first out fashion.
FIGURE 3-3:
FIGURE 3-4:
DS21095F-page 6
SDA
SCL
SDA
SDA
OUT
SCL
IN
DATA VALID (D)
T
SU
:
T
STA
SU
:
STA
BUS TIMING START/STOP
BUS TIMING DATA
T
SP
T
START
AA
T
F
T
HD
T
:
T
STA
LOW
HD
:
STA
T
HD
:
STA
T
HIGH
T
HD
:
DAT
T
AA
3.1.5
Each receiving device, when addressed, is obliged to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse which is associated with this acknowledge bit.
The device that acknowledges has to pull down the
SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable LOW during the HIGH
period of the acknowledge related clock pulse.
course, setup and hold times must be taken into
account. A master must signal an end of data to the
slave by not generating an acknowledge bit on the last
byte that has been clocked out of the slave. In this
case, the slave must leave the data line HIGH to enable
the master to generate the STOP condition.
V
Note:
HYS
T
SU
:
DAT
ACKNOWLEDGE
The 24LC21 does not generate any
acknowledge bits if an internal program-
ming cycle is in progress.
T
SU
T
SU
:
STO
:
STO
T
1996 Microchip Technology Inc.
R
STOP
T
BUF
Of

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