LT5568-2EUF-PBF LINER [Linear Technology], LT5568-2EUF-PBF Datasheet - Page 12

• Manufacturer Part Number: LT5568-2EUF-PBF
• Description: GSM/EDGE Optimized, High Linearity Direct Quadrature Modulator
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
LT5568-2
Evaluation Board
Figure 7 shows the evaluation board schematic. A good
ground connection is required for the exposed pad. If this
is not done properly, the RF performance will degrade. Ad-
ditionally, the exposed pad provides heat sinking for the part
and minimizes the possibility of the chip overheating.
12
BBMQ
V
CC
EN
LO
IN
J5
J4
BBMI
100Ω
Figure 7. Evaluation Circuit Schematic
R1
J1
1
2
3
4
GND
EN
GND
LO
GND
U
16
BBMQ GND
BBMI
5
BOARD NUMBER: DC1178A
15
6
GND
LT5568-2
U
14
BBPQ V
7
BBPI V
13
8
CC
CC
GND
GND
GND
GND
J2
W
RF
C1
100nF
BBPI
12
11
10
9
17
J6
J3
C2
100nF
BBPQ
U
RF
OUT
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V
CC
R1 (optional) limits the EN pin current in the event that
the EN pin is pulled high while the V
Figures 8 and 9 the silk screens and the PCB board layout
are shown.
Figure 8. Component Side of Evaluation Board
Figure 9. Bottom Side of Evaluation Board
CC
inputs are low. In
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