LT5568-2EUF-PBF LINER [Linear Technology], LT5568-2EUF-PBF Datasheet - Page 11

• Manufacturer Part Number: LT5568-2EUF-PBF
• Description: GSM/EDGE Optimized, High Linearity Direct Quadrature Modulator
• Manufacturer: LINER [Linear Technology]

APPLICATIO S I FOR ATIO
The RF output S
Table 4.
Table 4. RF Port Output Impedance vs Frequency for EN = High
and No LO Power Applied
For EN = Low the S
Table 5. RF Port Output Impedance vs Frequency for EN = Low
Frequency
Frequency
1000
1100
1200
1000
1100
1200
Figure 5. Equivalent Circuit Schematic of the RF Output
MHz
MHz
500
600
700
800
900
500
600
700
800
900
OUTPUT
Input Impedance
Input Impedance
RF
29.7 + j11.6
40.5 + j11.6
26.6 + j12.5
36.6 + j16.6
49.2 + j11.6
46.4 – j11.2
39.3 – j13.2
34.4 – j12.1
22
22.7 + j5.6
47.3 + j2.2
44.1 – j6.7
38.2 – j9.8
34.0 – j9.4
31.5 – j7.8
21.2 + j5.4
52.9 – j2.0
V
U
with no LO power applied is given in
22
CC
Ω
Ω
is given in Table 5.
21pF
U
7nH
0.381
0.290
0.164
0.037
0.094
0.171
0.218
0.245
0.409
0.340
0.241
0.116
0.034
0.121
0.188
0.231
Mag
Mag
W
1pF
55682 F05
S
S
51Ω
22
22
U
–126.9
–133.9
–143.1
–151.6
–101.1
–120.6
–133.8
Angle
164.0
142.0
121.9
139.6
Angle
164.9
142.5
118.1
–33.1
87.4
Note that an ESD diode is connected internally from the
RF output to ground (see Figure 5). For strong output
RF signal levels (higher than 3dBm), this ESD diode can
degrade the linearity performance if the 50Ω termination
impedance is connected directly to ground. To prevent this,
a coupling capacitor can be inserted in the RF output line.
This is strongly recommended during a 1dB compression
measurement.
Enable Interface
Figure 6 shows a simplifi ed schematic of the EN pin
interface. The voltage necessary to turn on the LT5568-2
is 1V. To disable (shut down) the chip, the enable voltage
must be below 0.5V. If the EN pin is not connected, the
chip is disabled. This EN = Low condition is assured by
the 75k on-chip pull-down resistor. It is important that
the voltage at the EN pin does not exceed V
than 0.5V. If this should occur, the supply current could
be sourced through the EN pin ESD protection diodes,
which are not designed to carry the full supply current,
and damage may result.
EN
Figure 6. EN Pin Interface
V
CC
75k
25k
55682 F06
LT5568-2
CC
by more
11
55682f