AT89C51IC2-RLTIM ATMEL [ATMEL Corporation], AT89C51IC2-RLTIM Datasheet - Page 68
AT89C51IC2-RLTIM
Manufacturer Part Number
AT89C51IC2-RLTIM
Description
8-bit Flash Microcontroller with 2-wire Interface
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT89C51IC2-RLTIM.pdf
(147 pages)
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Warm Reset
Watchdog Reset
68
AT89C51IC2
Table 1. Minimum Reset Capacitor Value for a 50 kΩ Pull-down Resistor
Note:
To achieve a valid reset, the reset signal must be maintained for at least 2 machine
cycles (24 oscillator clock periods) while the oscillator is running. The number of clock
periods is mode independent (X2 or X1).
As detailed in Section “Hardware Watchdog Timer”, page 102, the WDT generates a 96-
clock period pulse on the RST pin. In order to properly propagate this pulse to the rest of
the application in case of external capacitor or power-supply supervisor circuit, a 1 kΩ
resistor must be added as shown Figure 24.
Figure 24. Reset Circuitry for WDT Reset-out Usage
Start-Up Time
Oscillator
20 ms
These values assume V
on/off sequences is too fast, the power-supply de-coupling capacitors may not be fully
discharged, leading to a bad reset sequence.
5 ms
VDD
VDD
VSS
+
RST
1K
820 nF
2.7 µF
1 ms
DD
RST
starts from 0V to the nominal value. If the time between 2
VDD
VSS
P
VDD Rise Time
10 ms
1.2 µF
3.9 µF
From WDT
Reset Source
To CPU Core
and Peripherals
To Other
On-board
Circuitry
100 ms
(1)
4301C–8051–06/06
12 µF
12 µF
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