AT89C51IC2-RLTIM ATMEL [ATMEL Corporation], AT89C51IC2-RLTIM Datasheet - Page 31

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AT89C51IC2-RLTIM

Manufacturer Part Number
AT89C51IC2-RLTIM
Description
8-bit Flash Microcontroller with 2-wire Interface
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Figure 9. Auto-Reload Mode Up/Down Counter (DCEN = 1)
Programmable Clock-
Output
4301C–8051–06/06
F
CLK PERIPH
In the clock-out mode, timer 2 operates as a 50%-duty-cycle, programmable clock gen-
erator (See Figure 10). The input clock increments TL2 at frequency F
timer repeatedly counts to overflow from a loaded value. At overflow, the contents of
RCAP2H and RCAP2L registers are loaded into TH2 and TL2. In this mode, timer 2
overflows do not generate interrupts. The formula gives the clock-out frequency as a
function of the system oscillator frequency and the value in the RCAP2H and RCAP2L
registers:
For a 16 MHz system clock, timer 2 has a programmable frequency range of 61 Hz
(F
T2 pin (P1.0).
Timer 2 is programmed for the clock-out mode as follows:
It is possible to use timer 2 as a baud rate generator and a clock generator simulta-
neously. For this configuration, the baud rates and clock frequencies are not
independent since both functions use the values in the RCAP2H and RCAP2L registers.
CLK PERIPH
C l o c k O u t F r e q u e n c y
Set T2OE bit in T2MOD register.
Clear C/T2 bit in T2CON register.
Determine the 16-bit reload value from the formula and enter it in RCAP2H/RCAP2L
registers.
Enter a 16-bit initial value in timer registers TH2/TL2. It can be the same as the
reload value or a different one depending on the application.
To start the timer, set TR2 run control bit in T2CON register.
/2
16)
:6
to 4 MHz (F
(UP COUNTING RELOAD VALUE)
(DOWN COUNTING RELOAD VALUE)
RCAP2L
T2
(8-bit)
(8-bit)
(8-bit)
=
TL2
FFh
CLK PERIPH
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
4
×
(
T2CON
RCAP2H
C/T2
65536
(8-bit)
(8-bit)
TH2
(8-bit)
0
1
FFh
/4). The generated clock signal is brought out to
F
C L K P E R I P H
R C A P
T2CON
TR2
2
H
T2EX:
if DCEN=1, 1=UP
if DCEN=1, 0=DOWN
if DCEN = 0, up counting
R C A P
T2CON
TOGGLE
TF2
2
L
)
T2CON
EXF2
INTERRUPT
AT89C51IC2
TIMER 2
CLK PERIPH
/2. The
31

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