MC68HC908GT16_07 FREESCALE [Freescale Semiconductor, Inc], MC68HC908GT16_07 Datasheet - Page 58

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MC68HC908GT16_07

Manufacturer Part Number
MC68HC908GT16_07
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Configuration Register (CONFIG)
EXTXTALEN — External Crystal Enable Bit
EXTSLOW — Slow External Crystal Enable Bit
58
EXTXTALEN enables the external oscillator circuits to be configured for a crystal configuration where
the PTE4/OSC1 and PTE3/OSC2 pins are the connections for an external crystal.
Clearing the EXTXTALEN bit (default setting) allows the PTE3/OSC2 pin to function as a
general-purpose I/O pin. Refer to
Chapter 7 Internal Clock Generator (ICG) Module)
operation.
EXTXTALEN, when set, also configures the clock monitor to expect an external clock source in the
valid range of crystals (30 kHz to 100 kHz or 1 MHz to 8 MHz). When EXTXTALEN is clear, the clock
monitor will expect an external clock source in the valid range for externally generated clocks when
using the clock monitor (60 Hz to 32 MHz).
EXTXTALEN, when set, also configures the external clock stabilization divider in the clock monitor for
a 4096-cycle timeout to allow the proper stabilization time for a crystal. When EXTXTALEN is clear,
the stabilization divider is configured to 16 cycles since an external clock source does not need a
startup time.
The EXTSLOW bit has two functions. It configures the ICG module for a fast (1 MHz to 8 MHz) or slow
(30 kHz to 100 kHz) speed crystal. The option also configures the clock monitor operation in the ICG
module to expect an external frequency higher (307.2 kHz to 32 MHz) or lower (60 Hz to 307.2 kHz)
than the base frequency of the internal oscillator. See
Module).
1 = Allows PTE3/OSC2 to be an external crystal connection.
0 = PTE3/OSC2 functions as an I/O port pin (default).
1 = ICG set for slow external crystal operation
0 = ICG set for fast external crystal operation
Note: LVI5OR3 bit is only reset via POR (power-on reset)
Address:
Address:
Reset:
Reset:
Read:
Read:
Write:
Write:
This bit does not function without setting the EXTCLKEN bit also.
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
COPRS
$001E
$001F
Bit 7
Bit 7
0
0
0
Figure 4-1. Configuration Register 2 (CONFIG2)
Figure 4-2. Configuration Register 1 (CONFIG1)
= Unimplemented
LVISTOP
6
0
0
6
0
EXTXTALEN EXTSLOW EXTCLKEN
Table 4-1
LVIRSTD
5
0
5
0
for configuration options for the external source. See
LVIPWRD
NOTE
R
4
0
4
0
for a more detailed description of the external clock
= Reserved
Chapter 7 Internal Clock Generator (ICG)
See Note
LVI5OR3
3
0
3
SSREC
2
0
0
2
0
OSCENINSTOP
STOP
1
0
1
0
Freescale Semiconductor
COPD
Bit 0
Bit 0
0
R
0

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