UJA1078 NXP [NXP Semiconductors], UJA1078 Datasheet - Page 15

• Manufacturer Part Number: UJA1078
• Description: High-speed CAN/dual LIN core system basis chip
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
Table 6.
UJA1078_2
Product data sheet
Bit
3
2
1
0
Symbol
STBCC
RTHC
WSE1
WSE2
Int_Control register
Access Power-on
R/W
R/W
R/W
R/W
default
0
0
0
0
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Description
CAN standby control
reset threshold control
WAKE1 sample enable
WAKE2 sample enable
0: When the SBC is in Normal mode (MC = 1x):
1: CAN is in Lowpower mode with bus wake-up detection enabled,
regardless of the SBC mode (MC = xx). CAN wake-up interrupts can be
requested.
0: The reset threshold is set to the 90 % V1 undervoltage detection voltage
(V
1: The reset threshold is set to the 70 % V1 undervoltage detection voltage
(V
0: sampling continuously
1: sampling of WAKE1 is synchronized with WBIAS (sample rate controlled
by WBC)
0: sampling continuously
1: sampling of WAKE1 is synchronized with WBIAS (sample rate controlled
by WBC)
When the SBC is in Standby/Sleep mode (MC = 0x):
CAN is in Active mode. The wake-up flag (visible on RXDC) is cleared
regardless of V2 output voltage.
CAN is in Off mode. Bus wake-up detection is disabled. CAN wake-up
interrupts cannot be requested.
uvd
uvd
Rev. 02 — 27 May 2010
; see
; see
Table
Table
10)
10)
High-speed CAN/dual LIN core system basis chip
UJA1078
© NXP B.V. 2010. All rights reserved.
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