MCZ33784EF/R2- FREESCALE [Freescale Semiconductor, Inc], MCZ33784EF/R2- Datasheet - Page 11

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MCZ33784EF/R2-

Manufacturer Part Number
MCZ33784EF/R2-
Description
DSI 2.02 Sensor Interface
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
SUPPLY VOLTAGE
RECTIFIER
communications to be delivered to the 33784 over the bus.
The rectifier lies between BUSIN and H_CAP. During the idle
state of the bus, the rectifier allows the bus to charge an
external storage capacitor attached to H_CAP. During
signaling, the rectifier isolates H_CAP from the bus to prevent
the bus from draining the external capacitor while signaling.
The capacitor then supplies power to the 33784 during
signaling. The signaling time and the size of the external
capacitor must be selected so that the voltage on HCAP does
not drop below 6.77V during signaling.
5.0V REGULATOR
33784 and also supplies power to external devices, such as
accelerometers via the REGOUT pin. A bypass capacitor is
required on the REGOUT pin to keep the regulator stable. All
current supplied by the regulator is derived from the external
capacitor attached to H_CAP.
Analog Integrated Circuit Device Data
Freescale Semiconductor
There is an on-chip rectifier, which allows power and
An on-chip 5V regulator supplies internal power for the
Supply Voltage
MC33784 - Functional Diagram
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
Sensing & Control
Analog to Digital Converter
Supply Voltage
Power Stage
Control Logic
Transmitter
Receiver
Functional Internal Block Diagram
Clock
Sensing & Control
UNDER-VOLTAGE DETECTOR
(POR) signal during power-up and power-down of the 33784.
It also monitors the voltage on HCAP and REGOUT and
issues a reset when either of these pins fall below their
respective POR thresholds. The reset signal is filtered to
prevent glitches on HCAP or REGOUT from causing an
erroneous reset. Any time the 33784 is reset, the device will
need to be re-initialized before it will respond to further
commands.
LOGIC AND CONTROL
RECEIVER
when the bus is idle and when it is signaling. Communication
on the bus always begins when the voltage on BUSIN drops
below the frame threshold. This change from idle mode to
signal mode is sensed by the receiver and is interpreted as
the start of an incoming word.
below the Signal threshold. This starts a counter in a serial
decoder, which essentially measures the amount of time that
the bus voltage is below the signal threshold. When the bus
The under-voltage detector issues a power-ON reset
The receiver detects the voltage on BUSIN and senses
The first bit in the word begins when the bus voltage drops
Power Stage
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
Bus Switches
Bus switches
FUNCTIONAL DESCRIPTION
33784
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