FDC37M600 SMSC [SMSC Corporation], FDC37M600 Datasheet - Page 80

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FDC37M600

Manufacturer Part Number
FDC37M600
Description
ENHANCED SUPER I/O CONTROLLER WITH INFRARED SUPPORT
Manufacturer
SMSC [SMSC Corporation]
Datasheet
The infrared interface provides a two-way
wireless communications port using infrared as
a
implementations have been provided for the
second UART in this chip (logical device 5),
IrDA and Amplitude Shift Keyed IR.
transmission can use the standard UART2
TXD2 and RXD2 pins or optional IRTX and
IRRX pins. These can be selected through the
configuration registers.
IrDA allows serial communication at baud rates
up to 115.2 Kbps. Each word is sent serially
beginning with a zero value start bit. A zero is
signaled by sending a single IR pulse at the
beginning of the serial bit time.
signaled by sending no IR pulse during the bit
time.
parameters of these pulses and the IrDA
waveform.
The Amplitude Shift Keyed IR allows serial
communication at baud rates up to 19.2K Baud.
Each word is sent serially beginning with a zero
value start bit.
transmission
Please refer to the AC timing for the
A zero is signaled by
medium.
Two
INFRARED INTERFACE
A one is
The IR
IR
80
sending a
duration of the serial bit time. A one is signaled
by sending no transmission during the bit time.
Please refer to the AC timing for the parameters
of the ASK-IR waveform.
If the Half Duplex option is chosen, there is a
time-out when the direction of the transmission
is changed. This time-out starts at the last bit
transferred during a transmission and blocks the
receiver input until the timeout expires. If the
transmit buffer is loaded with more data before
the time-out expires, the timer is restarted after
the new byte is transmitted. If data is loaded
into the transmit buffer while a character is
being received, the transmission will not start
until the time-out expires after the last receive
bit has been received. If the start bit of another
character is received during this time-out, the
timer is restarted after the new character is
received. The IR half duplex time-out is
programmable via CRF2 in Logical Device 5.
This
programmed to any value between 0 and
10msec in 100usec increments.
register
500KHz
allows
the
waveform
time-out
for
to
the
be

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