FDC37M600 SMSC [SMSC Corporation], FDC37M600 Datasheet - Page 108

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FDC37M600

Manufacturer Part Number
FDC37M600
Description
ENHANCED SUPER I/O CONTROLLER WITH INFRARED SUPPORT
Manufacturer
SMSC [SMSC Corporation]
Datasheet
SERIAL IRQ
The FDC37M60x will support the serial interrupt
to transmit interrupt information to the host
system. The serial interrupt scheme adheres to
the Serial IRQ Specification for PCI Systems,
Version 6.0.
PCICLK
IRQSER
Drive Source
A) Start Frame timing with source sampled a low pulse on IRQ1
1) Start Frame pulse can be 4-8 clocks wide.
H=Host Control, R=Recovery, SL=Slave Control, T=Turn-Around, S=Sample
IRQ1
SL
or
H
START
Host Controller
START FRAME
H
1
R
108
T
Timing Diagrams For IRQSER Cycle
PCICLK = 33 MHz_IN pin
IRQSER = SIRQ pin
IRQ0 FRAME IRQ1 FRAME
S
None
R
T
S
IRQ1
R
T
IRQ2 FRAME
S
None
R
T

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