MC68HC708XL36 FREESCALE [Freescale Semiconductor, Inc], MC68HC708XL36 Datasheet - Page 289

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MC68HC708XL36

Manufacturer Part Number
MC68HC708XL36
Description
HCMOS Microcontroller Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
7-ports_a
MOTOROLA
NOTE:
DDRB[7:0] — Data Direction Register B Bits
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
Figure 7
When bit DDRBx is a logic 1, reading address $0001 reads the PBx data
latch. When bit DDRBx is a logic 0, reading address $0001 reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its data direction bit.
the port B pins.
1. Writing affects data register, but does not affect input.
These read/write bits control port B data direction. Reset clears
DDRB[7:0], configuring all port B pins as inputs.
Data Direction Bit
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
shows the port B I/O logic.
0
1
READ DDRB ($0005)
WRITE DDRB ($0005)
WRITE PORTB ($0001)
READ PORTB ($0001)
Go to: www.freescale.com
I/O Ports
Table 3. Port B Pin Operation
Figure 7. Port B I/O Circuit
RESET
Input, high-impedance
I/O Pin Mode
Output
Table 3
DDRBx
PBx
summarizes the operation of
Read
Latch
Pin
Access to Data Bit
MC68HC708XL36
Latch
Write
Latch
I/O Ports
(1)
Port B
289
PBx

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