MC68HC708XL36 FREESCALE [Freescale Semiconductor, Inc], MC68HC708XL36 Datasheet - Page 206

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MC68HC708XL36

Manufacturer Part Number
MC68HC708XL36
Description
HCMOS Microcontroller Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
SPI
MC68HC708XL36
206
Only a master SPI module can initiate transmissions. Software begins
the transmission from a master SPI module by writing to the transmit
data register. If the shift register is empty, the byte immediately transfers
to the shift register, setting the SPI transmitter empty bit, SPTE. The byte
begins shifting out on the MOSI pin under the control of the serial clock.
(See
The SPR1 and SPR0 bits control the baud rate generator and determine
the speed of the shift register. (See
on page 230.) Through the SPSCK pin, the baud rate generator of the
master also controls the shift register of the slave peripheral.
As the byte shifts out on the MOSI pin of the master, another byte shifts
in from the slave on the master’s MISO pin. The transmission ends when
the receiver full bit, SPRF, becomes set. At the same time that SPRF
becomes set, the byte from the slave transfers to the receive data
register. In normal operation, SPRF signals the end of a transmission.
Software clears SPRF by reading the SPI status and control register with
SPRF set and then reading the SPI data register. Writing to the SPI data
register clears the SPTE bit.
When the DMAS bit is set, the SPI status and control register does not
have to be read to clear the SPRF bit. A read of the SPI data register by
either the CPU or the DMA clears the SPRF bit. A write to the SPI data
register by the CPU or by the DMA clears the SPTE bit.
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure
SHIFT REGISTER
GENERATOR
MASTER MCU
BAUD RATE
Figure 3. Full-Duplex Master-Slave Connections
Go to: www.freescale.com
3.)
SPI
MISO
MOSI
SPSCK
SS
V
SPI Status and Control Register
DD
SPSCK
MISO
MOSI
SS
SHIFT REGISTER
SLAVE MCU
MOTOROLA
6-spi_c

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