MC68HC708XL36 FREESCALE [Freescale Semiconductor, Inc], MC68HC708XL36 Datasheet - Page 229

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MC68HC708XL36

Manufacturer Part Number
MC68HC708XL36
Description
HCMOS Microcontroller Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
29-spi_c
MOTOROLA
DMAS —DMA Select Bit
SPMSTR — SPI Master Bit
CPOL — Clock Polarity Bit
CPHA — Clock Phase Bit
This read/write bit selects DMA service requests when:
Setting the DMAS bit disables SPRF CPU interrupt requests and
SPTE CPU interrupt requests. Reset clears the DMAS bit.
This read/write bit selects master mode operation or slave mode
operation. Reset sets the SPMSTR bit.
This read/write bit determines the logic state of the SPSCK pin
between transmissions. (See
page 210.) To transmit data between SPI modules, the SPI modules
must have identical CPOL values. Reset clears the CPOL bit.
This read/write bit controls the timing relationship between the serial
clock and SPI data. (See
210.) To transmit data between SPI modules, the SPI modules must
have identical CPHA values. When CPHA = 0, the SS pin of the slave
SPI module must be set to logic 1 between bytes. (See
page 226.) Reset sets the CPHA bit.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = SPRF DMA and SPTE DMA service requests selected
0 = SPRF DMA and SPTE DMA service requests disabled
1 = Master mode
0 = Slave mode
The SPI receiver full bit, SPRF, becomes set and the SPI receiver
interrupt enable bit, SPIE, is also set
The SPI transmitter empty bit, SPTE, becomes set and the SPI
transmitter interrupt enable bit, SPTIE, is also set
SPRF CPU and SPTE CPU interrupt requests disabled
SPRF CPU and SPTE CPU interrupt requests selected
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SPI
Figure 4
Figure 4
on page 209 and
on page 209 and
Figure 6
MC68HC708XL36
Figure 13
Figure 6
I/O Registers
on page
on
on
229
SPI

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