MC68HC705SR3 MOTOROLA [Motorola, Inc], MC68HC705SR3 Datasheet - Page 71

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MC68HC705SR3

Manufacturer Part Number
MC68HC705SR3
Description
High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller Units
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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9.3
The SLOW mode function is controlled by the SM bit in the Miscellaneous Control Register. When
the SM bit is set, the internal bus clock is divided by 16, resulting to a frequency equal to the
oscillator frequency divide by 32. This feature permits a slow down of all the internal operations
and thus reduces power consumption — particularly useful while in WAIT mode. The SM bit is
automatically cleared while going to STOP mode.
SM — Slow Mode
9.4
If the Low Voltage Reset function is not enabled, the contents of RAM and CPU registers are
retained at supply voltages as low as 2Vdc. This is called the data-retention mode where the data
is held, but the device is not guaranteed to operate. The RESET pin must be held low during
data-retention mode.
The Low Voltage Reset Function is enabled/disabled by the LVRE bit in the Miscellaneous Control
Register ($0C).
LVRE — Low Voltage Reset Enable
MC68HC05SR3
Miscellaneous Control Register
Miscellaneous Control Register
1 (set)
0 (clear) –
1 (set)
0 (clear) –
SLOW Mode
Data-Retention Mode
Freescale Semiconductor, Inc.
For More Information On This Product,
Slow mode enabled. Internal bus frequency f
Slow mode disabled. Internal bus frequency f
Low Voltage Reset function enabled.
Low Voltage Reset function disabled.
Address bit 7
Address bit 7
Go to: www.freescale.com
$0C
$0C
LOW POWER MODES
KBIE
KBIE
KBIC
KBIC
bit 6
bit 6
INTO
INTO
bit 5
bit 5
INTE
INTE
bit 4
bit 4
LVRE
LVRE
bit 3
bit 3
OP
OP
=f
=f
bit 2
bit 2
SM
SM
OSC
OSC
IRQ2F IRQ2E 0001 0000
IRQ2F IRQ2E 0001 0000
bit 1
bit 1
32.
2.
bit 0
bit 0
MOTOROLA
on reset
on reset
State
State
TPG
9-3
9

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