AT83C5122_08 ATMEL [ATMEL Corporation], AT83C5122_08 Datasheet - Page 45
AT83C5122_08
Manufacturer Part Number
AT83C5122_08
Description
C51 Microcontroller with USB and Smart Card Reader Interfaces
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT83C5122_08.pdf
(208 pages)
- Current page: 45 of 208
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Use of PLL Clock
4202F–SCR–07/2008
When the CPU clock is fed by the PLL, the X2 mode is forbidden. The bit X2 must
always remain cleared in CKCON0 register. As the PR1 prescaler is always different
from 1/2, the usual X1 mode can not be defined. So it is necessary to define an equiva-
lent X1 or X2 mode from equivalent clock circuits, as in previous section.
Example: PR1=1/4, PLL feeds the CPU. The CPU works in this case at 24 MHz. This
frequency could also be obtained by an equivalent clock circuit where the on-chip oscil-
lator would run at 48 MHz in X1 mode or at 24 Mhz in X2 mode. So we can say that in
this configuration, the CPU works at 48 MHz / X1 or 24 MHz / X2 (See figures below).
As the X2 bit is cleared in CKCON0 register, we have always F
External Clock
External Clock
Crystal
2 MHz
1 MHz
8 MHz
X2 mode selected
X1 mode selected
PR1 Prescaler
1/8
1/2
AT83R5122, AT8xC5122/23
(Equivalent to)
(Equivalent to)
CPU frequency
PERIPH frequency
CPU frequency
PERIPH frequency
CPU frequency
PERIPH frequency
1 MHz
1 MHz
1 MHz
1 MHz
1 MHz
1 MHz
CK_IDLE
= F
CK_PERIPH
.
45
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