AT83C5122_08 ATMEL [ATMEL Corporation], AT83C5122_08 Datasheet - Page 127
AT83C5122_08
Manufacturer Part Number
AT83C5122_08
Description
C51 Microcontroller with USB and Smart Card Reader Interfaces
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT83C5122_08.pdf
(208 pages)
- Current page: 127 of 208
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Internal Baud Rate Generator
Synchronous Mode (Mode 0)
4202F–SCR–07/2008
INT1#
CK_
CK_
T1
T1
SI
GATE1
TMOD.7
Figure 67. Timer 1 Baud Rate Generator Block Diagram
When using the Internal Baud Rate Generator, the Baud Rate is derived from the over-
flow of the timer. As shown in Figure 68 the Internal Baud Rate Generator is an 8-bit
auto-reload timer feed by the peripheral clock or by the peripheral clock divided by 6
depending on the SPD bit in BDRCON register (see Table 82 on page 134). The Internal
Baud Rate Generator is enabled by setting BRR bit in BDRCON register. SMOD1 bit in
PCON register allows doubling of the generated baud rate.
Figure 68. Internal Baud Rate Generator Block Diagram
Mode 0 is a half-duplex, synchronous mode, which is commonly used to expand the I/0
capabilities of a device with shift registers. The transmit data (TXD) pin outputs a set of
eight clock pulses while the receive data (RXD) pin transmits or receives a byte of data.
The 8-bit data are transmitted and received least-significant bit (LSB) first. Shifts occur
at a fixed Baud Rate (see Section “Baud Rate Selection (Mode 0)”). Figure 69 shows
the serial port block diagram in Mode 0.
/ 6
/ 6
BDRCON.1
TMOD.6
C/T1#
SPD
TCON.6
TR1
0
1
0
1
BDRCON.4
BRR
AT83R5122, AT8xC5122/23
(8 bits)
(8 bits)
(8 bits)
(8 bits)
BRG
TH1
BRL
TL1
Overflow
Overflow
/ 2
/ 2
SMOD1
SMOD1
PCON.7
PCON.7
0
1
0
1
To serial Port
To serial Port
CLOCK
CLOCK
IBRG
T1
127
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