MCP2510-/P MICROCHIP [Microchip Technology], MCP2510-/P Datasheet - Page 47

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MCP2510-/P

Manufacturer Part Number
MCP2510-/P
Description
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
REGISTER 7-1:
© 2007 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
CANINTE - INTERRUPT ENABLE REGISTER (ADDRESS: 2Bh)
bit 7
MERRE: Message Error Interrupt Enable
1 = Interrupt on error during message reception or transmission
0 = Disabled
WAKIE: Wakeup Interrupt Enable
1 = Interrupt on CAN bus activity
0 = Disabled
ERRIE: Error Interrupt Enable (multiple sources in EFLG register)
1 = Interrupt on EFLG error condition change
0 = Disabled
TX2IE: Transmit Buffer 2 Empty Interrupt Enable
1 = Interrupt on TXB2 becoming empty
0 = Disabled
TX1IE: Transmit Buffer 1 Empty Interrupt Enable
1 = Interrupt on TXB1 becoming empty
0 = Disabled
TX0IE: Transmit Buffer 0 Empty Interrupt Enable
1 = Interrupt on TXB0 becoming empty
0 = Disabled
RX1IE: Receive Buffer 1 Full Interrupt Enable
1 = Interrupt when message received in RXB1
0 = Disabled
RX0IE: Receive Buffer 0 Full Interrupt Enable
1 = Interrupt when message received in RXB0
0 = Disabled
Legend:
R = Readable bit
-n = Value at POR
MERRE
R/W-0
WAKIE
R/W-0
ERRIE
R/W-0
W = Writable bit
’1’ = Bit is set
R/W-0
TX2IE
R/W-0
TX1IE
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R/W-0
TX0IE
MCP2510
x = Bit is unknown
RX1IE
R/W-0
DS21291F-page 47
R/W-0
RX0IE
bit 0

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