AIC1574 AIC [Analog Intergrations Corporation], AIC1574 Datasheet - Page 13

• Manufacturer Part Number: AIC1574
• Description: 5-bit DAC, Synchronous PWM Power Regulator with Triple Linear Controllers
• Manufacturer: AIC [Analog Intergrations Corporation]

extreme overload. A sustained overload on any output
or over-voltage on PWM output disable all converters
A simplified schematic is shown in figure 1 7. An
over-voltage detected on VSEN1 immediately sets
the fault latch. A sequence of three over-current
fault signals also sets the fault latch. An under-
voltage event on either linear output (VSEN2,
VSEN3, VSEN4) is ignored until the soft-start inter-
val. Cycling the bias input voltage (+12V off then on)
resets the counter and the fault latch.
Gate Drive Overlap Protection
The Overlap Protection circuit ensures that the Bot-
tom MOSFET does not turn on until the Upper
MOSFET source has reached a voltage low enough
to ensure that shoot-through will not occur.
Over-Voltage Protection
During operation, a short on the upper PWM
MOSFET (Q1) causes V
the output exceed the over-voltage threshold of
116% of DACOUT, the FAULT pin is set to fault
latch and turns Q2 on as required in order to regu-
late VOUT1 to 115% of DACOUT. The fault latch
raises the FAULT/RT pin close to VCC potential.
0.15V
OC1
LUV
4.0V
SS
OV
OUT1
+
+
to increase. When
Fig. 17 Simplified Schematic of Fault Logic
OVER CURRENT
R
S
LATCH
Q
POR
INHIBIT
COUNTER
R
S
and
A separate over-voltage circuit provides protection
during the initial application of power. For voltage on
VCC pin below the power-on reset (and above ~4V),
should VSEN1 exceed 1.0V, the lower MOSFET
(Q2) is driven on as needed to regulate VOUT1 to
1.0V.
Over-Current Protection
All outputs are protected against excessive over-
current.
MOSFET’s on-resistance, R
current for protection against shorted outputs. All
linear controllers monitor VSEN for under-voltage
events to protect against excessive current.
When the voltage across Q1 (ID•R
the level (200 A • R
outputs. Discharge soft-start capacitor (Css) with
25 A current sink, and increments the counter.
Css recharges and initiates a soft-start cycle again
until the counter increments to 3. This sets the fault
latch to disable all outputs. Fig.
over-current protection until an over load on OUT1.
Should excessive current cause VSEN to fall below
drive
FAULT LATCH
The
S
R
Q
the
PWM
VCC
OCSET
FAULT/RT
FAULT
controller
), this signal inhibit all
DS(ON)
6
DS(ON)
to monitor the
pin
illustrates the
uses
AIC1574
) exceeds
to
upper
13
VCC.