ADV212 AD [Analog Devices], ADV212 Datasheet - Page 13

• Manufacturer Part Number: ADV212
• Description: JPEG 2000 Video Codec
• Manufacturer: AD [Analog Devices]

EXTERNAL DMA MODE—FIFO READ, BURST MODE
Table 9.
Parameter
DREQ Pulse Width
RD to DREQ Deassert (DR × PULS = 0)
DACK to RD Setup
RD to Data Valid
Data Hold
RD Assert Pulse Width
RD Deassert Pulse Width
RD Deassert to Next DREQ
RD Deassert to DACK Deassert
1
2
Applies to assigned DMA channel if EDMOD0 or EDMOD1 <14:11> is programmed to a nonzero value.
For a definition of JCLK, see Figure 32.
HDATA
HDATA
HDATA
DREQ
DACK
DREQ
DACK
DREQ
DACK
RDFB
1
RD
RD
Figure 16. Burst Read Cycle for DREQ / DACK DMA Mode for Assigned DMA Channel
Figure 17. Burst Read Cycle for DREQ / DACK DMA Mode for Assigned DMA Channel
t
DREQPULSE
t
t
RD
RD
RD
t
t
DREQRTN
DACKSU
t
0
DACKSU
0
(EMOD0/EDMOD1 <14:11> Programmed to a Value of 0000)
t
(EMOD0/EDMOD1 <14:11> Not Programmed to a Value of 0
t
t
HD
DACKSU
HD
0
t
t
DREQRTN
RD
Figure 18. Burst Read Cycle for Fly-By DMA Mode
t
HD
1
1
1
Mnemonic
DREQ
t
t
t
t
RD
RD
t
t
DREQ RTN
DACK SU
RD
HD
DREQ WAIT
RD_DACK
LO
HI
Rev. 0 | Page 13 of 44
PULSE
RD
RD
LO
13
13
LO
13
Min
1 JCLK
2.5 JCLK
0
2.5
2.5
1.5 JCLK
1.5 JCLK
2.5 JCLK
0
14
14
14
t
RD
RD_DACK
t
RD_DACK
2
t
RD
RD_DACK
HI
HI
15
15
Typ
15
t
DREQWAIT
t
Max
15 JCLK
3.5 × JCLK + 7.5
9.7
3.5 × JCLK + 7.5
DREQWAIT
t
DREQWAIT
ADV212
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns