PIC12F609-I/PQTP MICROCHIP [Microchip Technology], PIC12F609-I/PQTP Datasheet - Page 36

• Manufacturer Part Number: PIC12F609-I/PQTP
• Description: 8-Pin Flash-Based, 8-Bit CMOS Microcontrollers
• Manufacturer: MICROCHIP [Microchip Technology]

PIC12F609/615/12HV609/615
REGISTER 4-5:
REGISTER 4-6:
DS41302A-page 34
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
bit 3
bit 2-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
Note 1:
U-0
U-0
—
—
2:
3:
4:
2:
Global GPPU must be enabled for individual pull-ups to be enabled.
The weak pull-up device is automatically disabled if the pin is in Output mode (TRISIO = 0).
The GP3 pull-up is enabled when configured as MCLR and disabled as an I/O in the Configuration Word.
WPU<5:4> always reads ‘1’ in XT, HS and LP Oscillator modes.
Global Interrupt Enable (GIE) must be enabled for individual interrupts to be recognized.
IOC<5:4> always reads ‘1’ in XT, HS and LP Oscillator modes.
Unimplemented: Read as ‘0’
WPU<5:4>: Weak Pull-up Control bits
1 = Pull-up enabled
0 = Pull-up disabled
Unimplemented: Read as ‘0’
WPU<2:0>: Weak Pull-up Control bits
1 = Pull-up enabled
0 = Pull-up disabled
Unimplemented: Read as ‘0’
IOC<5:0>: Interrupt-on-change GPIO Control bit
1 = Interrupt-on-change enabled
0 = Interrupt-on-change disabled
U-0
U-0
—
—
WPU: WEAK PULL-UP GPIO REGISTER
IOC: INTERRUPT-ON-CHANGE GPIO REGISTER
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-1
WPU5
R/W-0
IOC5
WPU4
R/W-1
R/W-0
IOC4
Preliminary
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
R/W-0
IOC3
U-0
—
R/W-1
WPU2
R/W-0
IOC2
© 2006 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
WPU1
R/W-1
R/W-0
IOC1
WPU0
R/W-1
R/W-0
IOC0
bit 0
bit 0