PIC12F609-I/PQTP MICROCHIP [Microchip Technology], PIC12F609-I/PQTP Datasheet - Page 111

• Manufacturer Part Number: PIC12F609-I/PQTP
• Description: 8-Pin Flash-Based, 8-Bit CMOS Microcontrollers
• Manufacturer: MICROCHIP [Microchip Technology]

FIGURE 11-9:
11.8
If
programmed, the on-chip program memory can be
read out using ICSP
11.9
Four memory locations (2000h-2003h) are designated
as ID locations where the user can store checksum or
other code identification numbers. These locations are
not accessible during normal execution but are
readable and writable during Program/Verify mode.
Only the Least Significant 7 bits of the ID locations are
used.
© 2006 Microchip Technology Inc.
Instruction Flow
(INTCON reg.)
(INTCON reg.)
Note:
Instruction
Fetched
Instruction
Executed
the
CLKOUT
Note 1:
INTF flag
INT pin
GIE bit
OSC1
Code Protection
ID Locations
code
PC
2:
3:
4:
(4)
The entire Flash program memory will be
erased when the code protection is turned
off. See the “PIC12F6XX/16F6XX Memory
Programming Specification” (DS41204)
for more information.
XT, HS or LP Oscillator mode assumed.
T
GIE = ‘1’ assumed. In this case after wake-up, the processor jumps to 0004h. If GIE = ‘0’, execution will continue in-line.
CLKOUT is not available in XT, HS, LP or EC Oscillator modes, but shown here for timing reference.
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1
Inst(PC) = Sleep
OST
protection
Inst(PC – 1)
= 1024 T
PC
™
WAKE-UP FROM SLEEP THROUGH INTERRUPT
for verification purposes.
OSC
(drawing not to scale). This delay does not apply to EC, INTOSC and RC Oscillator modes.
bit(s)
Inst(PC + 1)
Sleep
PC + 1
have
Processor in
PIC12F609/615/12HV609/615
not
Sleep
PC + 2
been
Preliminary
T
OST (2)
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Interrupt Latency
Inst(PC + 2)
Inst(PC + 1)
PC + 2
(3)
Dummy Cycle
PC + 2
Dummy Cycle
Inst(0004h)
0004h
DS41302A-page 109
Inst(0005h)
Inst(0004h)
0005h