CY8C20X96 CYPRESS [Cypress Semiconductor], CY8C20X96 Datasheet - Page 34

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CY8C20X96

Manufacturer Part Number
CY8C20X96
Description
CapSense Applications
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Thermal Impedances
Table 36. Thermal Impedances per Package
Solder Reflow Peak Temperature
This table lists the minimum solder reflow peak temperature to achieve good solderability.
Table 37. Solder Reflow Peak Temperature
Capacitance on Crystal Pins
Table 38. Typical Package Capacitance on Crystal Pins
Document Number: 001-12696 Rev. *F
Notes
14. T
15. To achieve the thermal impedance specified for the QFN package, the center thermal pad must be soldered to the PCB ground plane.
16. Higher temperatures may be required based on the solder melting point. Typical temperatures for solder are 220 ± 5
Refer to the solder manufacturer specifications.
J
= T
A
+ Power x θ
Package
32 QFN
48 QFN
24 QFN
32 QFN
48 QFN
48 SSOP
Package
48 SSOP
Package
16 QFN
24 QFN
32 QFN
48 QFN
16 QFN
JA
.
[15]
[15]
[15]
Package Capacitance
3.2 pF
3.3 pF
Minimum Peak Temperature
Typical θ
32.69
20.90
19.51
17.68
69
240
240
240
220
240
o
C/W
o
o
o
o
o
o
o
o
o
C
C
C
C
C
C/W
C/W
C/W
C/W
JA
[14]
[16]
Maximum Peak Temperature
o
C with Sn-Pb or 245 ± 5
CY8C20X36/46/66/96
260
260
260
260
260
o
o
o
o
o
C
C
C
C
C
o
C with Sn-Ag-Cu paste.
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