STPCI0180BTC3 STMICROELECTRONICS [STMicroelectronics], STPCI0180BTC3 Datasheet - Page 2

• Manufacturer Part Number: STPCI0180BTC3
• Description: PC Compatible Embedded Microprocessor
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STPC INDUSTRIAL
2/55
X86 Processor core
Fully static 32-bit 5-stage pipeline, x86
processor fully PC compatible.
Access up to 4GB of external memory.
8Kbyte unified instruction and data cache
with write back capability.
Parallel processing integral floating point unit,
with automatic power down.
Clock core speeds up to 100 MHz.
Fully static design for dynamic clock control.
Low power and system management modes.
Optimized design for 3.3V operation.
DRAM Controller
Integrated system memory and graphic frame
memory.
Supports up to 128-MByte system memory in
4 banks and down to as little as 2Mbytes.
Supports 4-MByte, 8-MByte, 16-MByte, and
32-MByte single-sided and double-sided
DRAM SIMMs.
Four quad-word write buffers for CPU to
DRAM and PCI to DRAM cycles.
Four quad-word read prefetch buffers for PCI
masters.
Supports Fast Page Mode & EDO DRAMs.
Programmable timing for DRAM parameters
including CAS pulse width, CAS pre-charge
time, and RAS to CAS delay.
60, 70, 80 & 100ns DRAM speeds.
Memory hole between 1 MByte & 8 MByte
supported for PCI/ISA busses.
Hidden refresh.
Graphics Controller
64-bit windows accelerator.
Complete backward compatibility to VGA and
SVGA standards.
Hardware acceleration for text (generalized
bit map expansion), bitblts, transparent blts
and fills.
Up to 64 x 64 bit graphics hardware cursor.
Up to 4MB long linear frame buffer.
8, 16, 24 and 32 bit pixels.
Drivers for Windows and other operating
systems.
Issue 1.1
CRT Controller
Integrated 135MHz triple RAMDAC allowing
for 1280 x 1024 x 75Hz display.
Requires external frequency synthesizer and
reference sources.
8, 16, 24 and 32-bit pixels.
Interlaced or non-interlaced output.
TFT Interface
Programmable panel size up to 1024 by 1024
pixels.
Support for 640 x 480, 800 x 600 & 1024 x
768 active matrix TFT flat panels with 9, 12,
18-bit interface.
Support 1 & 2 Pixels per Clock.
Programmable image positionning.
Programmable blank space insertion in text
mode.
Programmable horizontal and vertical image
expansion in graphic mode.
A fully programmable PWM (Pulse Width
Modulator) signals to adjust the flat panel
brightness and contrast.
Supports PanelLink
transmitter externally for high resolution
panel interface.
PCI Controller
Fully
specification.
Integrated PCI arbitration interface. Up to 3
masters can connect directly. External PAL
allows for greater than 3 masters.
Translation of PCI cycles to ISA bus.
Translation of ISA master initiated cycle to
PCI.
Support for burst read/write from PCI master.
0.33X and 0.5X CPU clock PCI clock.
Local Bus interface
66MHz, low latency bus.
Asynchronous / synchronous.
22-bit address and 16-bit data busses.
2 Programmable Flash EPROM Chip Select.
4 Programmable I/O Chip Select.
Separate memory and I/O address spaces.
Memory prefetch (improved performances).
compliant
with
TM
high speed serial
PCI
Version
2.1