STA2065A STMICROELECTRONICS [STMicroelectronics], STA2065A Datasheet - Page 5

• Manufacturer Part Number: STA2065A
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STA2065
2
2.1
2.2
2.2.1
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
System description
MCU
ARM1176-JZF advanced risc machine CPU up to 624 MHz (with Vdd greater or equal to
1.20 V and under process and temperature worst case conditions).
Embedded memories
Embedded SRAM (eSRAM)
The embedded SRAM is 8K x 32 (32 KB).
System functions
System and reset controller (SRC)
This provides a control interface for clock generation components external to the subsystem.
It also controls system-wide and peripherals-specific energy management features.
PMU
The power manager module controls the SLEEP to DEEP-SLEEP modes transition,
controls the external voltage switches on the Vdd and Vddio, monitors the external power
supply (via two signals, Vddok and BATOK), can force the emergency entry of the SDRAM
in self-refresh, and controls the wake-up from DEEP-SLEEP mode.
DMA
Direct memory access can be used with DMA peripherals. FIFO fill/empty requests from
these peripherals can be serviced immediately by the DMA Controller without CPU
interaction. Peripheral-to-peripheral and memory-to-memory DMA are also supported.
STA2065 features two DMA engines. Each DMA supports up to 8-channels and up to 32
requests.
Vectored interrupt controller (VIC)
The VIC allows the OS interrupt handler to quickly dispatch interrupt service routines in
response to peripheral interrupts.
GPIOs
Four GPIO ports provide 160 programmable inputs or outputs that can be controlled in two
modes:
●
●
software mode through an APB bus interface
hardware mode through a hardware control interface
Doc ID16050 Rev 1
System description
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