XC3S200 XILINX [Xilinx, Inc], XC3S200 Datasheet - Page 15

• Manufacturer Part Number: XC3S200
• Description: XC17V00 Series Configuration PROMs
• Manufacturer: XILINX [Xilinx, Inc]

Revision History
The following table shows the revision history for this document.
.
Notice of Disclaimer
THE XILINX HARDWARE FPGA AND CPLD DEVICES REFERRED TO HEREIN (“PRODUCTS”) ARE SUBJECT TO THE TERMS AND
CONDITIONS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED AT http://www.xilinx.com/warranty.htm. THIS LIMITED
WARRANTY DOES NOT EXTEND TO ANY USE OF PRODUCTS IN AN APPLICATION OR ENVIRONMENT THAT IS NOT WITHIN THE
SPECIFICATIONS STATED IN THE XILINX DATA SHEET. ALL SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE.
PRODUCTS ARE NOT DESIGNED OR INTENDED TO BE FAIL-SAFE OR FOR USE IN ANY APPLICATION REQUIRING FAIL-SAFE
PERFORMANCE, SUCH AS LIFE-SUPPORT OR SAFETY DEVICES OR SYSTEMS, OR ANY OTHER APPLICATION THAT INVOKES
THE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). USE OF PRODUCTS IN CRITICAL APPLICATIONS IS AT THE SOLE RISK OF CUSTOMER, SUBJECT TO
APPLICABLE LAWS AND REGULATIONS.
DS073 (v1.12) November 13, 2008
Product Specification
07/26/00
10/09/00
11/16/00
02/20/01
04/04/01
10/09/01
02/27/02
06/14/02
07/29/02
11/05/02
04/10/03
06/07/07
11/13/08
Date
R
Version
1.10
1.11
1.12
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
Initial Xilinx release.
Updated 20-pin PLCC Pinouts.
Updated pinouts for XC17V16 and XC17V08, I
and C
Added note to pinouts for “no connect,” updated
Added XC2V products to Compatible PROM table, updated
Corrected bitstream length for SCV405E, added power-on supply requirements and note for power-on
reset, updated configuration bits for Virtex-II devices, removed CF from
Added Virtex-II Pro™ FPGAs to the
Made additions and changes to
Added Virtex-II Pro FPGAs to
Added pinout diagrams, changed
Condition for XC17V04, XC17V02, and XC17V01, page 11
Condition for XC17V16 and XC17V08, page
Added Spartan-3 FPGAs to
•
• Corrected XC3S50 bitstream size in
• Added section
• Removed maximum soldering temperature (T
• Added notes to timing diagram under
• Added notes and updated timing diagram
• Reversed polarity of RESET/OE signal in timing diagram under
• Added support for discontinued device and package combinations per XCN07010.
• Added T
• Updated
Figure 2, page 2
Refer to Xilinx Device Package User Guide for package soldering guidelines.
XC17V02, and XC17V01, page 11
and XC17V08, page 12
notes for clarification.
OUT
from 10 pF to 15 pF, added I
J
Figure
to
"Absolute Maximum Ratings
Selecting Reset Polarity and Configuration Modes, page
3.
updated to show correct three-state control on output data buses.
for clarification.
www.xilinx.com
Truth Table for XC17V00 Control Inputs, page
, page
Xilinx FPGAs and Compatible PROMs, page
, page
, page
6.
for clarification.
CCS
Xilinx FPGAs and Compatible PROMs, page
6, and added footnotes to
AC Characteristics over Operating Condition for XC17V04,
6.
for XC17V16 and XC17V08 at 500 μA.
(1)
AC Characteristics over Operating Condition for XC17V16
12.
," page
Revision
CCA
Figure
SOL
DC Characteristic from standby to active mode; C
) from
10.
3.
XC17V00 Series Configuration PROMs
"Absolute Maximum Ratings
and
Figure
AC Characteristics over Operating
, page 13
3, updated text for Virtex-II FPGAs.
AC Characteristics over Operating
Figure
8.
7.
for consistency and added
3, and updated FPGA list.
6.
6.
(1)
," page
10.
IN
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