XC3S200 XILINX [Xilinx, Inc], XC3S200 Datasheet - Page 11

• Manufacturer Part Number: XC3S200
• Description: XC17V00 Series Configuration PROMs
• Manufacturer: XILINX [Xilinx, Inc]

AC Characteristics over Operating Condition for XC17V04, XC17V02, and
XC17V01
X-Ref Target - Figure 4
DS073 (v1.12) November 13, 2008
Product Specification
Notes:
1.
2.
3.
4.
5.
6.
Symbol
T
T
T
T
T
T
T
T
T
T
T
T
CYC
HCE
HOE
CEH
CAC
SCE
AC test load = 50 pF.
Float delays are measured with 5 pF AC loads. Transition is measured at ±200 mV from steady state active levels.
Guaranteed by design, not tested.
All AC parameters are measured with V
If T
If T
OE
OH
HC
CE
DF
LC
RESET/OE
CEH
HOE
DATA
High, 2 μs, T
High, 2 μs, T
OE to data delay
CE to data delay
CLK to data delay
CE or OE to data float delay
Data hold from CE, OE, or CLK
Clock periods
CLK Low time
CLK High time
CE setup time to CLK (to guarantee proper counting)
CE hold time to CLK (to guarantee proper counting)
OE hold time (guarantees counters are reset)
CE High time (guarantees counters are reset)
CLK
R
CE
Notes:
1 The XC17V00 RESET/OE input polarity is programmable. The RESET/OE input is shown in the timing diagram with active-high
2 The diagram shows timing relationships. The diagram is not reflective of actual FPGA signal sequences. See the appropriate
RESET polarity. Timing specifications are identical for both polarity settings.
FPGA data sheet or user guide for actual configuration signal sequences.
CE
OE
(3)
(3)
= 2 μs.
= 2 μs.
T CE
T OE
(2,3)
Description
IL
(3)
= 0.0V and V
T SCE
T LC
IH
= 3.0V.
www.xilinx.com
T CAC
T HC
T OH
XC17V00 Series Configuration PROMs
Min
67
25
25
25
25
20
–
–
–
–
0
0
T OH
T SCE
T CYC
T DF
Max
T HOE
30
45
45
50
–
–
–
–
–
–
–
–
TCEH
DS073_04_14102005
T HCE
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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