EP1C4 ALTERA [Altera Corporation], EP1C4 Datasheet - Page 92
EP1C4
Manufacturer Part Number
EP1C4
Description
Cyclone FPGA Family Data Sheet
Manufacturer
ALTERA [Altera Corporation]
Datasheet
1.EP1C4.pdf
(104 pages)
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Quantity
Price
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Cyclone Device Handbook, Volume 1
4–22
Preliminary
SSTL-2 class II
LVDS
LVCMOS
3.3-V LVTTL
2.5-V LVTTL
1.8-V LVTTL
1.5-V LVTTL
3.3-V PCI
SSTL-3 class I
SSTL-3 class II
SSTL-2 class I
SSTL-2 class II
LVDS
LVCMOS
3.3-V LVTTL
Table 4–40. Cyclone I/O Standard Column Pin Input Delay Adders (Part 2 of 2)
Table 4–41. Cyclone I/O Standard Row Pin Input Delay Adders
Table 4–42. Cyclone I/O Standard Output Delay Adders for Fast Slew Rate on Column Pins (Part 1 of 2)
I/O Standard
I/O Standard
Standard
(1)
2 mA
4 mA
8 mA
12 mA
8 mA
12 mA
16 mA
24 mA
4 mA
-6 Speed Grade
Min
-6 Speed Grade
Min
-6 Speed Grade
Min
Max
− 278
− 261
Max
− 250
− 250
− 278
− 278
− 261
Max
− 489
− 855
− 993
− 347
− 858
− 819
− 993
182
278
27
0
0
0
0
0
-7 Speed Grade
Min
-7 Speed Grade
Min
-7 Speed Grade
Min
− 1,142
− 1,142
Max
− 320
− 301
Max
− 288
− 288
− 320
− 320
− 301
Max
− 563
− 984
− 400
− 987
− 942
209
319
31
0
0
0
0
0
-8 Speed Grade
Min
-8 Speed Grade
Min
-8 Speed Grade
Min
Altera Corporation
− 1,112
− 1,291
− 1,116
− 1,065
− 1,291
Max
− 362
− 340
Max
− 325
− 325
− 362
− 362
− 340
Max
− 636
− 452
236
361
35
0
0
0
0
0
January 2007
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