AD14160KB-4 AD [Analog Devices], AD14160KB-4 Datasheet - Page 35

• Manufacturer Part Number: AD14160KB-4
• Description: Quad-SHARC DSP Multiprocessor Family
• Manufacturer: AD [Analog Devices]

REV. A
DATA RECEIVE– INTERNAL CLOCK
DATA TRANSMIT– INTERNAL CLOCK
RCLK
TCLK
TFS, RFS, DT
TCLK, RCLK
RFS
TFS
RCLK (INT)
DR
DT
TCLK (INT)
TCLK (EXT)
TCLK (INT)
CLKIN
DRIVE
DRIVE
EDGE
EDGE
DT
DT
t
t
t
NOTE: EITHER THE RISING EDGE OR FALLING EDGE OF RCLK, TCLK CAN BE USED AS THE ACTIVE SAMPLING EDGE.
NOTE: EITHER THE RISING EDGE OR FALLING EDGE OF RCLK, TCLK CAN BE USED AS THE ACTIVE SAMPLING EDGE.
HFSI
HFSE
HDTI
SPORT DISABLE DELAY
FROM INSTRUCTION
t
DFSE
t
t
DRIVE
EDGE
DRIVE
DFSI
EDGE
DDTI
t
t
DDTEN
DDTIN
LOW TO HIGH ONLY
t
t
SCLKIW
SCLKIW
t
DCLK
t
DPTR
t
t
t
SFSI
SDRI
SFSI
SAMPLE
SAMPLE
EDGE
EDGE
t
t
t
SPORT ENABLE AND
THREE-STATE
LATENCY
IS TWO CYCLES
HFSI
HDRI
HFSI
Figure 24. Serial Ports
–35–
TCLK / RCLK
TCLK / RCLK
TFS (EXT)
DATA RECEIVE– EXTERNAL CLOCK
DATA TRANSMIT– EXTERNAL CLOCK
RCLK
TCLK
CLKIN
RFS
TFS
DR
DT
NOTE: APPLIES ONLY TO GATED SERIAL CLOCK MODE WITH
EXTERNAL TFS, AS USED IN THE SERIAL PORT SYSTEM I/O FOR
MESH MULTIPROCESSING.
DRIVE
DRIVE
EDGE
EDGE
t
t
t
HFSE
DRIVE
DRIVE
EDGE
EDGE
HFSE
HDTE
t
t
t
DFSE
DFSE
DDTTI
t
t
DDTE
DDTTE
t
STFSCK
t
t
SCLKW
SCLKW
AD14160/AD14160L
t
HTFSCK
t
t
t
SDRE
SFSE
SFSE
SAMPLE
SAMPLE
EDGE
EDGE
t
t
t
HFSE
HDRE
HFSE