ADSP-21266_07 AD [Analog Devices], ADSP-21266_07 Datasheet - Page 36
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ADSP-21266_07
Manufacturer Part Number
ADSP-21266_07
Description
Embedded Processor
Manufacturer
AD [Analog Devices]
Datasheet
1.ADSP-21266_07.pdf
(44 pages)
- Current page: 36 of 44
- Download datasheet (895Kb)
ADSP-21266
JTAG Test Access Port and Emulation
Table 34. JTAG Test Access Port and Emulation
1
2
Parameter
Timing Requirements
t
t
t
t
t
t
Switching Characteristics
t
t
System Inputs = AD15–0, SPIDS, CLK_CFG1–0, RESET, BOOT_CFG1–0, MISO, MOSI, SPICLK, DAI_Px, FLAG3–0.
System Outputs = MISO, MOSI, SPICLK, DAI_Px, AD15–0, RD, WR, FLAG3–0, CLKOUT, EMU, ALE.
TCK
STAP
HTAP
SSYS
HSYS
TRSTW
DTDO
DSYS
TCK Period
TDI, TMS Setup Before TCK High
TDI, TMS Hold After TCK High
System Inputs Setup Before TCK High
System Inputs Hold After TCK High
TRST Pulse Width
TDO Delay from TCK Low
System Outputs Delay After TCK Low
OUTPUTS
SYSTEM
SYSTEM
INPUTS
TCK
TMS
TDO
TDI
Figure 28. JTAG Test Access Port and Emulation
t
DTDO
Rev. C | Page 36 of 44 | October 2007
1
2
1
t
TCK
t
t
DSYS
SSYS
t
STAP
t
HTAP
t
HSYS
Min
20
5
6
7
8
4 × t
CK
Max
7
10
Unit
ns
ns
ns
ns
ns
ns
ns
ns
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