DSP56156FV40 MOTOROLA [Motorola, Inc], DSP56156FV40 Datasheet - Page 21
DSP56156FV40
Manufacturer Part Number
DSP56156FV40
Description
16-bit Digital Signal Processor
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.DSP56156FV40.pdf
(76 pages)
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Other Clock and PLL Operation Timing
Clock and PLL timings are listed in Table 12 and the clocking configurations are illustrated in
Figure 6.
MOTOROLA
EXTAL
1000 pF
CLKO
EXTAL
NOTES: 1. Maximum DSP operating frequency. See Table 11.
100 K
2. An AC coupling capacitor is required on EXTAL if the levels are out of the normal CMOS level
CS1-CS0
PLL Output frequency
EXTAL Input Clock Amplitude (See Note 2)
range (V
2
Freescale Semiconductor, Inc.
ILC
7
Characteristics
T
For More Information On This Product,
>20% of V
H
ED3-ED0
1 to
Figure 6 Clocking Configurations
Figure 5 External Clock Timing
Table 12 Clock and PLL Timing
4
Go to: www.freescale.com
6.5
CC
16
or V
GSM
T
DSP56156 Data Sheet
8
IHC
L
<70% of V
PLL
PFD
CODEC
2
SXFC
CC
YD3-YD0
).
Min
10 nF
LF
1 to
10
1
XFC
6
16
(See Note 1)
V
Max Fosc
0.01 F
CCS
0.1 F
Max
VCO
V
internal phase PH0 at Fosc
AC Electrical Characteristics and Timing
CC
4
GNDS
Unit
MHz
Vpp
90%
10%
PLLE=1
PLLE=0
Clock Operation Timing
Midpoint
V
V
5
IHC
ILC
Fosc
PLL
21
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