MCP434X MICROCHIP [Microchip Technology], MCP434X Datasheet - Page 60
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MCP434X
Manufacturer Part Number
MCP434X
Description
7/8-Bit Quad SPI Digital POT with Non-Volatile Memory
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.MCP434X.pdf
(80 pages)
MCP434X/436X
7.9
This command is a special case of the High Voltage
Decrement Wiper
commands to the non-volatile memory locations 02h,
03h, and 0Fh. This command is used to enable or
disable either the software Write Protect, wiper 0, wiper
1, wiper 2 and wiper 3 WiperLock Technology.
Table 7-6
Voltage command and the result of those commands
on the non-volatile WP, WL0 WL1, WL2, or WL3 bits.
The format of the command is shown in
(Enable) or
TABLE 7-6:
DS22233A-page 60
Note 1:
0Bh - 0Eh
Address
Memory
0Ah
04h
05h
00h
01h
02h
03h
06h
07h
08h
09h
0Fh
Modify Write Protect or WiperLock
Technology (High Voltage)
Enable and Disable
(1)
(1)
(1)
shows the memory addresses, the High
Reserved addresses: Increment or Decrement commands are invalid for these addresses.
Figure 7-6
(1)
ADDRESS MAP TO MODIFY WRITE PROTECT AND WIPERLOCK TECHNOLOGY
and High Voltage
High Voltage
Wiper 0 register is decremented
Wiper 1 register is decremented
WL0 is enabled
WL1 is enabled
TCON0 register not changed, CMDERR bit is
set
STATUS register not changed, CMDERR bit is
set
Wiper 2 register is decremented
Wiper 3 register is decremented
WL2 is enabled
WL3 is enabled
TCON1 register not changed, CMDERR bit is
set
Reserved
WP is enabled
(Disable).
Decrement Wiper
Increment Wiper
Figure 7-8
Command’s and Result
7.9.1
Figure 6-4
waveforms for a single Modify Write Protect or
WiperLock Technology command.
A Modify Write Protect or WiperLock Technology
Command will only start an EEPROM write cycle (t
after a properly formatted Command (8-clocks) has
been received and the CS pin transitions to the inactive
state (V
After the CS pin is driven inactive (V
interface may immediately be re-enabled by driving the
CS pin to the active state (V
During an EEPROM write cycle, only serial commands
to Volatile memory (addresses 00h, 01h, 04h, 05h, 06h,
07h, and 0Ah) are accepted. All other serial commands
are ignored until the EEPROM write cycle (t
pletes. This allows the Host Controller to operate on the
Volatile Wiper registers and the TCON register, and to
Read the Status Register. The EEWA bit in the Status
register indicates the status of an EEPROM Write
Cycle.
High Voltage
Wiper 0 register is incremented
Wiper 1 register is incremented
WL0 is disabled
WL1 is disabled
TCON0 register not changed, CMDERR bit is
set
STATUS register not changed, CMDERR bit is
set
Wiper 2 register is incremented
Wiper 3 register is incremented
WL2 is disabled
WL3 is disabled
TCON1 register not changed, CMDERR bit is
set
Reserved
WP is disabled
IH
).
SINGLE ENABLE WRITE PROTECT
OR WIPERLOCK TECHNOLOGY
(HIGH VOLTAGE)
through
Increment Wiper
© 2009 Microchip Technology Inc.
Figure 6-5
IL
or V
IHH
).
show
IH
), the serial
wc
possible
) com-
wc
)