MCP4332T-503E/ML MICROCHIP [Microchip Technology], MCP4332T-503E/ML Datasheet - Page 57
MCP4332T-503E/ML
Manufacturer Part Number
MCP4332T-503E/ML
Description
7/8-Bit Quad SPI Digital POT with Volatile Memory
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.MCP4332T-503EML.pdf
(88 pages)
- Current page: 57 of 88
- Download datasheet (6Mb)
7.6
The Read command is a 16-bit command. The format
of the command is shown in
The first 6 bits of the Read command determine the
address and the command. The 7th clock will output
the CMDERR bit on the SDO pin. The remaining
9-clocks the device will transmit the 9 data bits (D8:D0)
of the specified address (AD3:AD0).
Figure 7-4
Read command.
FIGURE 7-4:
2010 Microchip Technology Inc.
SDI
SDO
A
D
3
1
1
Read Data
Normal and High Voltage
shows the SDI and SDO information for a
A
D
2
1
1
COMMAND BYTE
D
A
1
1
1
D
A
1
0
1
Read Command – SDI and SDO States.
1
1
1
Figure
1
1
1
X
1
0
7-4.
X
D
8
0
D
X
0
7
D
X
0
6
READ DATA
X
D
0
5
DATA BYTE
X
D
4
0
X
D
3
0
X
D
2
0
7.6.1
The read operation requires that the CS pin be in the
active state (V
the inactive state (V
(V
byte and data byte) is then clocked in on the SCK and
SDI pins. The SDO pin starts driving data on the 7th bit
(CMDERR bit) and the addressed data comes out on
the 8th through 16th clocks.
Figure 6-3
D
X
0
1
IL
or V
D
X
0 Attempted Memory Read of Reserved
0
IHH
Valid Address/Command combination
Memory location
show possible waveforms for a single read.
). The 16-bit Read command (command
SINGLE READ
IL
MCP433X/435X
or V
IHH
IH
) and is driven to the active state
). Typically, the CS pin will be in
Figure 6-2
DS22242A-page 57
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