MCP4332T-503E/ML MICROCHIP [Microchip Technology], MCP4332T-503E/ML Datasheet - Page 47
MCP4332T-503E/ML
Manufacturer Part Number
MCP4332T-503E/ML
Description
7/8-Bit Quad SPI Digital POT with Volatile Memory
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.MCP4332T-503EML.pdf
(88 pages)
- Current page: 47 of 88
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6.0
The MCP43XX devices support the SPI serial protocol.
This SPI operates in the Slave mode (does not
generate the serial clock).
The SPI interface uses up to four pins. These are:
• CS – Chip Select
• SCK – Serial Clock
• SDI – Serial Data In
• SDO – Serial Data Out
FIGURE 6-1:
2010 Microchip Technology Inc.
Note 1: If high voltage commands are desired, some type of external circuitry needs to be implemented.
SERIAL INTERFACE (SPI)
Typical SPI Interface Connections
Controller
Typical SPI Interface Block Diagram.
Host
I/O
SDO
SDI
SCK
(1)
(Master Out – Slave In (MOSI))
(Master In – Slave Out (MISO))
Typical SPI Interface is shown in
interface, the Master’s Output pin is connected to the
Slave’s Input pin and the Master’s Input pin is
connected to the Slave’s Output pin.
The MCP4XXX SPI’s module supports two (of the four)
standard SPI modes. These are Mode 0,0 and 1,1. The
SPI mode is determined by the state of the SCK pin
(V
inactive (V
All SPI interface signals are high-voltage tolerant.
IH
or V
IL
IH
) on the when the CS pin transitions from
) to active (V
MCP433X/435X
IL
or V
SDI
SCK
SDO
CS
MCP4XXX
IHH
Figure
).
DS22242A-page 47
6-1. In the SPI
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