MCP4332T-503E/ML MICROCHIP [Microchip Technology], MCP4332T-503E/ML Datasheet - Page 51
MCP4332T-503E/ML
Manufacturer Part Number
MCP4332T-503E/ML
Description
7/8-Bit Quad SPI Digital POT with Volatile Memory
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.MCP4332T-503EML.pdf
(88 pages)
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7.0
The MCP43XX’s SPI command format supports
16 memory address locations and four commands.
Each command has two modes:
• Normal Serial Commands
• High-Voltage Serial Commands
Normal serial commands are those where the CS pin is
driven to V
CS pin is driven to V
possible commands. These commands are shown in
Table
The
Decrement Wiper
byte, see
Data
byte and a data byte. The command byte contains two
data bits, see
Table 7-2
memory location and the corresponding values on the
SDI and SDO pins.
Table 7-3
and their interaction with other device features.
FIGURE 7-1:
2010 Microchip Technology Inc.
D
A
3
Memory
Address
and
7-1.
8-bit
A
D
2
8-bit Command
Command Byte
DEVICE COMMANDS
shows an overview of all the SPI commands
Write Data
A
D
shows the supported commands for each
1
Figure
IL
. With high-voltage serial commands, the
A
D
commands
0
Figure
Command
C
1
Bits
7-1, while 16-bit commands
C
0
commands) contain a command
IHH
7-1.
commands) contain a command
General SPI Command Formats.
D
Data
Bits
9
. In each mode, there are four
D
8
(Increment
A
D
3
Memory
Address
D
Wiper
A
2
Command Byte
D
A
1
(Read
A
D
0
Command
and
C
1
Bits
C
16-bit Command
0
D
9
D
8
7.1
The command byte has three fields, the address, the
command, and 2 data bits, see
only one of the data bits is defined (D8). This is for the
Write command.
The device memory is accessed when the master
sends a proper command byte to select the desired
operation. The memory location getting accessed is
contained in the command byte’s AD3:AD0 bits. The
action desired is contained in the command byte’s
C1:C0 bits, see
desired memory location will be read, written,
incremented (wiper setting +1) or decremented (wiper
setting -1). The Increment and Decrement commands
are only valid on the volatile wiper registers.
As the command byte is being loaded into the device
(on the SDI pin), the device’s SDO pin is driving. The
SDO pin will output high bits for the first six bits of that
command. On the 7th bit, the SDO pin will output the
CMDERR
Condition”). The 8th bit state depends on the
command selected.
TABLE 7-1:
C1:C0
States
D
7
Bit
11
00
01
10
D
6
D
5
Data
Bits
Data Byte
Command Byte
Command
Read Data
Write Data
Increment
Decrement
D
4
bit
D
3
MCP433X/435X
D
2
Table
state
COMMAND BIT OVERVIEW
D
1
D
0
7-1. C1:C0 determines if the
(see
16-Bits Both
16-Bits Both
8-Bits
8-Bits
# of
Bits
Command
Section 7.3
Figure
Bits
C C
1 0
1 0 = DECR
1 1 = Read Data
0 0 = Write Data
0 1 = INCR
Operates on
Volatile/
Nonvolatile
memory
Volatile Only
Volatile Only
DS22242A-page 51
7-1. Currently
“Error
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