DAC1405D750HW NXP [NXP Semiconductors], DAC1405D750HW Datasheet - Page 19

• Manufacturer Part Number: DAC1405D750HW
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
DAC1405D750_1
Preliminary data sheet
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Default settings are shown highlighted.
Table 20.
Bit
7 to 0 FREQ_NCO[15:8]
Bit
7 to 0 FREQ_NCO[23:16]
Bit
7 to 0 FREQ_NCO[31:24]
Bit
7 to 0 PH_NCO[7:0]
Bit
7 to 0 PH_NCO[15:8]
Bit
7
6
5 to 0 DAC_A_OFFSET[5:0]
Bit
7 to 6 DAC_A_GAIN_
5 to 0 DAC_A_GAIN_
Symbol
Symbol
Symbol
Symbol
Symbol
Symbol
DAC_A_PD
DAC_A_SLEEP
Symbol
COARSE[1:0]
FINE[5:0]
FREQNCO_LISB register (address 04h) bit description
FREQNCO_UISB register (address 05h) bit description
FREQNCO_MSB register (address 06h) bit description
PHINCO_LSB register (address 07h) bit description
PHINCO_MSB register (address 08h) bit description
DAC_A_Cfg_1 register (address 09h) bit description
DAC_A_Cfg_2 register (address 0Ah) bit description
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 10 March 2010
Dual 14-bit DAC, up to 750 Msps; 4× and 8× interpolating
Access Value Description
R/W
Access Value Description
R/W
Access Value Description
R/W
Access Value Description
R/W
Access Value Description
R/W
Access Value Description
R/W
R/W
R/W
Access Value Description
R/W
R/W
-
-
-
-
-
0
1
0
1
-
-
-
lower intermediate 8 bits for the NCO
frequency setting
upper intermediate 8 bits for the NCO
frequency setting
most significant 8 bits for the NCO frequency
setting
lower 8 bits for the NCO phase setting
most significant 8 bits for the NCO phase
setting
DAC A power
DAC A Sleep mode
lower 6 bits for the DAC A offset
lower 2 bits for the DAC A gain setting for
coarse adjustment
lower 6 bits for the DAC A gain setting for fine
adjustment
on
off
disabled
enabled
DAC1405D750
© NXP B.V. 2010. All rights reserved.
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