DAC1006LCWM NSC [National Semiconductor], DAC1006LCWM Datasheet - Page 11

• Manufacturer Part Number: DAC1006LCWM
• Description: uP Compatible, Double-Buffered D to A Converters
• Manufacturer: NSC [National Semiconductor]

The output voltage swing can be expanded by adding 2
resistors to Figure 10 as shown in Figure 11 These added
resistors are used to attenuate the
gain A
amp determines the most negative output voltage
(when the V
zero) with the component values shown The complete dy-
namic range of V
input of the op amp As the voltage at the V
from 0V to
range from
can be easily developed by using the LM336 zener which
can be biased through the R
to V
5 3 Op Amp V
Proper operation of the ladder requires that all of the 2R
legs always go to exactly 0 V
voltage V
every millivolt of V
error At first this seems unusually sensitive until it becomes
clear the 1 mV is 0 01% of the 10V reference High resolu-
tion converters of high accuracy require attention to every
detail in an application to achieve the available performance
which is inherent in the part To prevent this source of error
the V
‘‘zero adjust’’ of the DAC calibration sequence and should
be done first
a
V voltage of
Switching Mode
CC
OS
V
(
of the op amp has to be initially zeroed This is the
b
OS
) from the
b
a
REF
of the external op amp cannot be tolerated as
10 V
V(1023 1024) the output of the op amp will
OS
a
2 500 V
voltage at the
OUT
Adjust (Zero Adjust) for Current
OS
DC
will introduce 0 01% of added linearity
is provided by the gain from the (
to
a
V terminal to the output of the op
DC
a
FIGURE 10 Providing a Bipolar Output Voltage with a Single Op Amp
10V (1023 1024) when using a
The 2 5 V
FB
DC
internal resistor connected
a
(ground) Therefore offset
a
input of the op amp is
FIGURE 11 Increasing the Output Voltage Swing
V voltage The overall
DC
reference voltage
REF
pin ranges
b
4(
a
a
V)
)
11
If the V
er Note that no ‘‘dc balancing’’ resistance should be used
in the grounded positive input lead of the op amp This re-
sistance and the input current of the op amp can also create
errors The low input biasing current of the BI-FET op amps
makes them ideal for use in DAC current to voltage applica-
tions The V
digital input of all zeros to force I
can be temporarily connected from the inverting input to
ground to provide a dc gain of approximately 15 to the V
of the op amp and make the zeroing easier to sense
5 4 Full-Scale Adjust
The full-scale adjust procedure depends on the application
circuit and whether the DAC is operated in the current
switching mode or in the voltage switching mode Tech-
niques are given below for all of the possible application
circuits
5 4 1 Current Switching with Unipolar Output Voltage
After doing a ‘‘zero adjust ’’ set all of the digital input levels
HIGH and adjust the magnitude of V
V
This completes the DAC calibration
OUT
eb
OS
(ideal V
is to be adjusted there are a few points to consid-
OS
of the op amp should be adjusted with a
REF
)
1023
1024
OUT
e
REF
0 mA A 1 k
for
TL H 5688– 13
resistor
OS