PCA9675BS NXP [NXP Semiconductors], PCA9675BS Datasheet

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PCA9675BS

Manufacturer Part Number
PCA9675BS
Description
Remote 16-bit I/O expander for Fm+ I2C-bus with interrupt
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1. General description
2. Features
The PCA9675 provides general purpose remote I/O expansion for most microcontroller
families via the two-line bidirectional bus (I
family.
The PCA9675 is a drop in upgrade for the PCF8575 providing higher Fast-mode Plus
(Fm+) I
dimming of LEDs, higher I
can be on the bus without the need for bus buffers, higher total package sink capacity
(400 mA versus 100 mA) that supports having all 25 mA LEDs on at the same time and
more device addresses (64 versus 8) are available to allow many more devices on the bus
without address conflicts.
The device consists of a 16-bit quasi-bidirectional port and an I
PCA9675 has a low current consumption and includes latched outputs with high current
drive capability for directly driving LEDs.
It also possesses an interrupt line (INT) which can be connected to the interrupt logic of
the microcontroller. By sending an interrupt signal on this line, the remote I/O can inform
the microcontroller if there is incoming data on its ports without having to communicate via
the I
the I/Os as inputs.
I
I
I
I
I
I
I
I
I
I
I
I
I
I
PCA9675
Remote 16-bit I/O expander for Fm+ I
Rev. 01 — 1 February 2007
1 MHz I
Compliant with the I
SDA with 30 mA sink capability for 4000 pF buses
2.3 V to 5.5 V operation with 5.5 V tolerant I/Os
16-bit remote I/O pins that default to inputs at power-up
Latched outputs with 25 mA sink capability for directly driving LEDs
Total package sink capability of 400 mA
Active LOW open-drain interrupt output
64 programmable slave addresses using 3 address pins
Readable device ID (manufacturer, device type, and revision)
Low standby current
ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
Latch-up testing is done to JEDEC standard JESD78 which exceeds 100 mA
2
40 C to +85 C operation
C-bus. The internal Power-On Reset (POR) or software reset sequence initializes
2
C-bus speeds (1 MHz versus 400 kHz) so that the output can support PWM
2
C-bus interface
2
C-bus Fast and Standard modes
2
C-bus drive (30 mA versus 3 mA) so that many more devices
2
C-bus) and is a part of the Fast-mode Plus
2
C-bus with interrupt
2
C-bus interface. The
Product data sheet

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PCA9675BS Summary of contents

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PCA9675 Remote 16-bit I/O expander for Fm+ I Rev. 01 — 1 February 2007 1. General description The PCA9675 provides general purpose remote I/O expansion for most microcontroller families via the two-line bidirectional bus (I family. The PCA9675 is a ...

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... PCA9675DB SSOP24 PCA9675DK PCA9675DK SSOP24 PCA9675PW PCA9675PW TSSOP24 PCA9675BQ 9675 DHVQFN24 plastic dual in-line compatible thermal enhanced very thin quad PCA9675BS 9675 HVQFN24 [1] The PCA9675DB is a drop-in replacement (same package, footprint, pinout and software) for the PCF8575TS. [2] Also known as QSOP24. PCA9675_1 ...

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NXP Semiconductors 5. Block diagram INT AD0 AD1 AD2 SCL SDA Fig 1. Block diagram of PCA9675 data from Shift Register data to Shift Register Fig 2. Simplified schematic diagram of P00 to P17 PCA9675_1 Product ...

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NXP Semiconductors 6. Pinning information 6.1 Pinning INT AD1 AD2 P00 P01 P02 P03 P04 P05 P06 P07 V Fig 3. Pin configuration for SO24 Fig 5. Pin configuration for SSOP24 PCA9675_1 Product data sheet Remote 16-bit I/O expander for ...

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... P16 P17 AD0 PCA9675_1 Product data sheet Remote 16-bit I/O expander for Fm P00 AD0 P01 2 17 P17 P02 3 16 P16 PCA9675BS P03 4 15 P15 5 14 P04 P14 P05 6 13 P13 002aab630 Transparent top view Pin description Pin SO, SSOP, TSSOP, HVQFN ...

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NXP Semiconductors Table 2. Symbol SCL SDA V DD [1] HVQFN and DHVQFN package die supply ground is connected to both the V pad. The V electrical, and board-level performance, the exposed pad needs to be soldered to the board ...

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NXP Semiconductors 7.1.1 Address maps Table 3. AD2 ...

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NXP Semiconductors Table 3. AD2 SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA PCA9675_1 Product data ...

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NXP Semiconductors 7.2 Software Reset call, and Device ID addresses Two other different addresses can be sent to the PCA9675. • General Call address: allows to reset the PCA9675 through the I reception of the right I information. • Device ...

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NXP Semiconductors 2 The I C-bus master must interpret a non-acknowledge from the PCA9675 (at any time ‘Software Reset Abort’. The PCA9675 does not initiate a reset of its registers. The unique sequence that initiates a Software Reset ...

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NXP Semiconductors Remark: The reading of the Device ID can be stopped anytime by sending a NACK command. Remark: If the master continues to ACK the bytes after the third byte, the PCA9675 rolls back to the first byte and ...

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NXP Semiconductors 8. I/O programming 8.1 Quasi-bidirectional I/O architecture The PCA9675’s 16 ports (see as input or output ports. Input data is transferred from the ports to the microcontroller in the Read mode (see (see Figure Every data transmission from ...

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NXP Semiconductors SCL slave address SDA START condition write to port data output from port P05 output voltage P05 pull-up output current P16 output voltage ...

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SCL P0x SDA DATA 00 START condition R/W acknowledge from slave read from port 0 data into port 0 DATA 00 ...

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SCL P0x SDA DATA 00 START condition R/W acknowledge from slave read from port 0 t h(D) data into port 0 ...

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NXP Semiconductors 8.4 Power-on reset When power is applied reset condition until V and the PCA9675 registers and I states. Thereafter V 8.5 Interrupt output (INT) The PCA9675 provides an open-drain interrupt (INT) which can be fed ...

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NXP Semiconductors 9. Characteristics of the I 2 The I C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be ...

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NXP Semiconductors SDA SCL MASTER TRANSMITTER/ RECEIVER Fig 22. System configuration 9.3 Acknowledge The number of data bytes transferred between the START and the STOP conditions from transmitter to receiver is not limited. Each byte of eight bits is followed ...

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NXP Semiconductors 10. Application design-in information 10.1 Bidirectional I/O expander applications In the 8-bit I/O expander application shown in to P07 are outputs. When used in this configuration, during a write, the input (P00 and P01) must be written as ...

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NXP Semiconductors 10.3 Differences between the PCA9675 and the PCF8575 The PCA9675 is a drop in replacement for the PCF8575 and can used without electrical or software modifications, but there is a difference in interrupt output release timing during the ...

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NXP Semiconductors 12. Static characteristics Table 5. Static characteristics Symbol Parameter Supplies V supply voltage DD I supply current DD I standby current stb V power-on ...

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NXP Semiconductors 13. Dynamic characteristics Table 6. Dynamic characteristics Symbol Parameter f SCL clock frequency SCL t bus free time between a BUF STOP and START ...

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NXP Semiconductors START protocol condition (S) t SU;STA SCL t BUF SDA t HD;STA Rise and fall times refer Fig 26. I C-bus timing diagram PCA9675_1 Product data sheet Remote 16-bit I/O expander for Fm+ I bit ...

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NXP Semiconductors 14. Package outline SO24: plastic small outline package; 24 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT ...

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NXP Semiconductors SSOP24: plastic shrink small outline package; 24 leads; body width 5 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. ...

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NXP Semiconductors SSOP24: plastic shrink small outline package; 24 leads; body width 3.9 mm; lead pitch 0.635 DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) A UNIT ...

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NXP Semiconductors TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm ...

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NXP Semiconductors DHVQFN24: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 24 terminals; body 3.5 x 5.5 x 0.85 mm terminal 1 index area terminal 1 index area ...

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NXP Semiconductors HVQFN24: plastic thermal enhanced very thin quad flat package; no leads; 24 terminals; body 0.85 mm terminal 1 index area terminal 1 24 index area DIMENSIONS (mm are ...

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NXP Semiconductors 15. Handling information Inputs and outputs are protected against electrostatic discharge in normal handling. However completely safe you must take normal precautions appropriate to handling integrated circuits. 16. Soldering This text provides a very brief insight ...

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NXP Semiconductors • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities ...

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NXP Semiconductors Fig 33. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 17. Abbreviations Table 9. Acronym CDM CMOS ESD GPIO HBM LED ID ...

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NXP Semiconductors 19. Legal information 19.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...

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NXP Semiconductors 21. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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