AD6655-125EBZ1 AD [Analog Devices], AD6655-125EBZ1 Datasheet - Page 11

• Manufacturer Part Number: AD6655-125EBZ1
• Description: IF Diversity Receiver
• Manufacturer: AD [Analog Devices]

Parameter
DIGITAL SPECIFICATIONS—AD6655BCPZ-125/AD6655BCPZ-150
AVDD = 1.8 V, DVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input, 1.0 V internal reference,
DCS enabled, unless otherwise noted.
Table 6.
DIFFERENTIAL CLOCK INPUTS (CLK+, CLK−)
SYNC INPUT
LOGIC INPUT (CSB)
LOGIC INPUT (SCLK/DFS)
LOGIC INPUTS (SDIO/DCS, SMI SDFS)
Logic Compliance
Internal Common-Mode Bias
Differential Input Voltage
Input Voltage Range
Input Common-Mode Range
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Capacitance
Input Resistance
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
Logic Compliance
Internal Bias
Input Voltage Range
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Capacitance
Input Resistance
1
2
1
Temp
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Min
0.2
AVDD − 0.3
1.1 V
1.2
0
−10
−10
8
AVDD − 0.3
1.2
0
−10
−10
8
1.22
0
−10
40
1.22
0
−92
−10
1.22
0
−10
38
Rev. 0 | Page 11 of 84
CMOS/LVDS/LVPECL
AD6655BCPZ-125
Typ
1.2
4
10
1.2
4
10
26
2
26
2
26
5
CMOS
Max
6
AVDD + 1.6
AVDD
0.8
+10
+10
12
AVDD + 1.6
0.8
+10
+10
3.6
0.6
+10
132
3.6
0.6
−135
+10
3.6
0.6
+10
128
3.6
3.6
12
Min
0.2
AVDD − 0.3
1.1 V
1.2
0
−10
−10
8
AVDD − 0.3
1.2
0
−10
−10
8
1.22
0
−10
40
1.22
0
−92
−10
1.22
0
−10
38
CMOS/LVDS/LVPECL
AD6655BCPZ-150
Typ
4
10
1.2
4
10
26
2
26
2
26
5
CMOS
1.2
Max
6
AVDD + 1.6
AVDD
3.6
0.8
+10
+10
12
AVDD + 1.6
3.6
0.8
+10
+10
12
3.6
0.6
+10
132
3.6
0.6
−135
+10
3.6
0.6
+10
128
AD6655
Unit
V
V p-p
V
V
V
V
μA
μA
pF
kΩ
V
V
V
V
μA
μA
pF
kΩ
V
V
μA
μA
kΩ
pF
V
V
μA
μA
kΩ
pF
V
V
μA
μA
kΩ
pF