MAX6850 MAXIM [Maxim Integrated Products], MAX6850 Datasheet
MAX6850
Related parts for MAX6850
MAX6850 Summary of contents
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... The MAX6850 provides timing to generate the PWM waveforms to drive the tube filament from a DC supply. The filament drive is synchronized to the display multi- plexing to eliminate beat artifacts. The MAX6850 is compatible with SPI™ and QSPI™. For a 2-wire interfaced version, refer to the MAX6851* data sheet. *Future product— ...
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... SCLK _______________________________________________________________________________________ Continuous Power Dissipation (T 16-Pin QSOP (derate at 8.34mW/°C above +70°C).....667mW Operating Temperature Range (T MAX6850AEE................................................-40°C to +125°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300° unless otherwise noted.) (Note 1) ...
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Interfaced, 7-, 14-, and 16-Segment Alpha- numeric Vacuum-Fluorescent Display Controller DC ELECTRICAL CHARACTERISTICS (continued) (Typical operating circuit 2.7V to 3.6V, T PARAMETER SYMBOL Output Rise and Fall Time PHASE1, PHASE2, PORT0, PORT1, PUMP, VFLOAD, VFDOUT, VFCLK, VFBLANK ...
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Interfaced, 7-, 14-, and 16-Segment Alpha- numeric Vacuum-Fluorescent Display Controller (Typical Operating Circuit 3.3V SUPPLY CURRENT vs. SUPPLY VOLTAGE 2.2 2.1 2 +125° -40°C A 1.8 1.7 1.6 1.5 ...
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Interfaced, 7-, 14-, and 16-Segment Alpha- numeric Vacuum-Fluorescent Display Controller (Typical Operating Circuit 3.3V vs. TEMPERATURE OSC 2.5 2.0 1.5 1.0 0.5 0 -40 -25 - TEMPERATURE (°C) PIN NAME Serial-Clock Output to ...
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... GRID 11 Figure 1. Example of a One-Digit-per-Grid Display Detailed Description Overview of the MAX6850 The MAX6850 VFD controller generates the multiplex timing for the following VFD display types: • Multiplexed displays with one digit per grid, and grids (in 48/1 mode). Each grid can contain ...
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... VFCLK SCLK CS VFLOAD VFLOAD CS VFBLANK VFBLANK Figure 4. Connection of the MAX6850 to VFD Driver and VFD Tube _______________________________________________________________________________________ GRID 3 GRID 4 GRID 5 out of phase with the cursor. The blink-speed control is software selectable to be one or two blinks per second (OSC = 4MHz). DP segments can be lit or off, but have no blink control. ...
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... Figure block diagram of the VFD tube driver and VFD tube. The MAX6850 has two display modes (Table 1), select the M bit in the configuration register (Table 23). The display modes trade the maximum allowable num- ...
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... Shift limit Cursor Factory reserved. Do not write to register. Character Registers The MAX6850 uses 48 character registers (48/1 mode) (Table character registers (96/2 mode) (Table 5) to store the 7-, 14-, and 16-segment characters (Table 6). Each digit is represented by 1 byte of memo- ry. The data in the character registers does not control the character segments directly ...
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... The MSB, shown the ROM maps (Tables 7 and 8), controls the DP segment of the digit set to light the DP. There are two font maps stored in the MAX6850. One font map covers 14-segment displays (Table 8), and the other suits 16-segment displays (Table 7). The F bit in the configuration register (Table 20) selects between the two font maps ...
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... R/W — — — The 24 user-definable characters are represented by 48 entries of 7-bit data, two entries per character, and are stored in the MAX6850’s internal RAM. CODE D11 D10 — — ...
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... The font address pointer can be written, setting one of 48 addresses between 0x00 and 0x2F, but cannot be read back. The font data is written to and read from the MAX6850 indi- rectly, using this font address pointer. Unused font locations can be used as general-purpose scratch RAM, bearing in mind that the font registers are only 7 bits wide, not 8 ...
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Interfaced, 7-, 14-, and 16-Segment Alpha- numeric Vacuum-Fluorescent Display Controller Table 7. 16-Segment Display Font Map MSB x000 x001 x010 x011 x100 LSB 0000 RAM00 RAM10 0001 RAM01 RAM11 0010 RAM02 RAM12 0011 RAM03 RAM13 0100 RAM04 RAM14 0101 ...
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Interfaced, 7-, 14-, and 16-Segment Alpha- numeric Vacuum-Fluorescent Display Controller Table 9. Memory Mapping of User-Defined Font Register 0x05 COMMAND REGISTER READ OR ADDRESS DATA WRITE 0x85 0x00–0x7F Read 0x05 0x00–0x7F Write 0x05 0x80–0xFF Write Table 10. Font Pointer ...
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... MAX6850 comes out of shutdown. When the MAX6850 comes out of shutdown, the exter- nal VFD tube driver is presumed to contain invalid data. The VFBLANK output is used to disable the VFD tube driver for the first multiplex cycle after exiting shutdown, clearing any invalid data ...
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Interfaced, 7-, 14-, and 16-Segment Alpha- numeric Vacuum-Fluorescent Display Controller Table 12. User-Definable Character Mapping BIT/SEGMENT MAPPING FOR USER-DEFINABLE FONTS WHEN APPLIED TO 7-SEGMENT DIGITS FONT BYTE BIT 6 BIT 5 RAMxx byte 0 7-seg a 7-seg b RAMxx ...
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Interfaced, 7-, 14-, and 16-Segment Alpha- numeric Vacuum-Fluorescent Display Controller Table 15. Annunciator Registers Format ANNUNCIATOR BYTE BIT ALLOCATIONS Annunciator A1 is off. Annunciator A1 is lit only for the first half of each blink period. Annunciator A1 is ...
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... F bit can be either set or cleared. Global Blink Timing Synchronization (T Data Bit D4) Format Setting the T bit in multiple MAX6850s at the same time (or in quick succession) synchronizes the blink timing across all the devices (Table 21). The display multiplex- ing sequence is also reset, which can give rise to a one-time display flicker when the register is written ...
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Interfaced, 7-, 14-, and 16-Segment Alpha- numeric Vacuum-Fluorescent Display Controller Table 20. Font Selection (F Data Bit D3) Format 14- and 7-segment fonts 16- and 7-segment fonts Table 21. Global Blink Timing Synchronization (T Data Bit D4) Format Blink ...
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... MAX6850 stores the last 16 bits received, including the previous transmission(s). The general case is when n bits (where n > 16) are transmitted to the MAX6850. The last bits comprising bits {n-15} to {n} are retained and are parallel loaded into the 16-bit latch as bits D15 to D0, respectively (Figure 10). ...
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... BIT DIN 1 2 N-31 N-30 DOUT Figure 10. Transmission of More than 16 Bits to the MAX6850 VFLOAD VFCLK VFDOUT Figure 11. VFD Interface Timing Diagram 3) Clock 16 bits of data into DIN, D15 first to D0 last, observing the setup and hold times. Bit D15 is high, indicating a read command, and bits D14 through D8 contain the address of the register to read ...
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Interfaced, 7-, 14-, and 16-Segment Alpha- numeric Vacuum-Fluorescent Display Controller 100µs TIMESLOT 100µs TIMESLOT GRID 0 GRID 1 µ µ µ µ 1. VFCLK DD0 DD1 DD2 DD3 DD4 DD5 DD6 DD7 ...
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Interfaced, 7-, 14-, and 16-Segment Alpha- numeric Vacuum-Fluorescent Display Controller Table 27. Intensity Register Format VFBLANK BEHAVIOR DUTY CYCLE (OSC = 4MHz) 1/16 (min on) High for 6.25µs, low for 6.25µs, high for 87.5µs High for 6.25µs, low for ...
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Interfaced, 7-, 14-, and 16-Segment Alpha- numeric Vacuum-Fluorescent Display Controller 100µs TIMESLOT 100µs TIMESLOT GRID 0 GRID 1 MINIMUM 6.25µs INTERDIGIT BLANKING INTERVAL (OSC = 4MHz) VFBLANK 1/16TH (MIN ON) 2/16TH 3/16TH 4/16TH 5/16TH 6/16TH 7/16TH 8/16TH 9/16TH 10/16TH ...
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... LSB. Output Shift-Limit Register The output serial interface is used to transfer display data from the MAX6850 to the display driver. The serial interface bit-stream output length is programmable bits, which are labeled DD0–DD83. Set the num- ber of bits with the shift-limit register, address 0x0E ...
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Interfaced, 7-, 14-, and 16-Segment Alpha- numeric Vacuum-Fluorescent Display Controller Table 31. Output Map RAM Codes OUTPUT MAP RAM ADDRESS RANGE CONTENT grids character segments 55 56 ...
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... Cursor segment for digits 2nd row the filament must be powered by a DC-to-AC or DC-to- DC converter. The MAX6850 can generate the waveforms on the PHASE1 and PHASE2 outputs to drive the VFD filament using a full bridge (push-pull drive). The PHASE1 and PHASE2 outputs can be used as general-purpose out- puts if the filament drive is not required ...
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Interfaced, 7-, 14-, and 16-Segment Alpha- numeric Vacuum-Fluorescent Display Controller Table 32. Output Map RAM Initial Power-Up Status OUTPUT MAP RAM POWER-UP DEFAULT ADDRESS CONTENT (in order ...
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Interfaced, 7-, 14-, and 16-Segment Alpha- numeric Vacuum-Fluorescent Display Controller Table 33. Setting Output Map Address Pointer MODE Set output map address to minimum (0x00) with data 0x80. (Note that this address is set as a power-up default.) Set ...
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... The PORT0 and PORT1 shutdown outputs allow exter- nal hardware (for example, a DC-DC converter power VFD TUBE supply for VFD disabled by the MAX6850 when the MAX6850 is shut down. The 625Hz, 1250Hz, and 2500Hz outputs can drive a piezo sounder either from PORT0 or PORT1 alone both ports together as bridge drive ...
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Interfaced, 7-, 14-, and 16-Segment Alpha- numeric Vacuum-Fluorescent Display Controller Table 38. PHASE1 Register Format PHASE1 BEHAVIOR General-purpose output, logic 0. This is the power-up condition. General-purpose output, logic 1. Output gives blink status: zero if blink phase P0; ...
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Interfaced, 7-, 14-, and 16-Segment Alpha- numeric Vacuum-Fluorescent Display Controller Table 41. PORT0 Register Format PORT0 PORT BEHAVIOR General-purpose output, logic 0. This is the power-up condition. General-purpose output, logic 1. Outp ves ...
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... The MAX6850 operates from a single 2.7V to 3.6V power supply. Bypass the power supply to GND with a 0.1µF capacitor as close to the device as possible. Add a bulk capacitor (such as a low-cost electrolytic 1µF to 22µF) if the MAX6850 is driving high current from any of the general-purpose output ports. Chip Information TRANSISTOR COUNT: 129,898 ...
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Interfaced, 7-, 14-, and 16-Segment Alpha- numeric Vacuum-Fluorescent Display Controller (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) Maxim cannot assume responsibility for use ...