AD7366_07 AD [Analog Devices], AD7366_07 Datasheet - Page 24

• Manufacturer Part Number: AD7366_07
• Description: True Bipolar Input, Dual 1 ?s, 12-/14-Bit, 2-Channel SAR ADCs
• Manufacturer: AD [Analog Devices]

AD7366/AD7367
MICROPROCESSOR INTERFACING
The serial interface on the AD7366/AD7367 allows the parts
to be directly connected to a range of different microprocessors.
This section explains how to interface the AD7366/AD7367
with some more common microcontrollers and DSP serial
interface protocols.
AD7366/AD7367 TO ADSP-218x
The ADSP-218x family of DSPs interfaces directly to the
AD7366/AD7367 without any glue logic required. The V
pin of the AD7366/AD7367 takes the same supply voltage as
that of the ADSP-218x. This allows the ADC to operate at a
higher supply voltage than its serial interface and therefore, the
ADSP-218x, if necessary. This example shows both D
D
of the ADSP-218x. The SPORT0 and SPORT1 control registers
should be set up as shown in Table 11 and Table 12.
Table 11. SPORT0 Control Register Setup
Setting
TFSW = RFSW = 1
INVRFS = INVTFS = 1
DTYPE = 00
SLEN = 1111
ISCLK = 1
TFSR = RFSR = 1
IRFS = 0
ITFS = 1
Table 12. SPORT1 Control Register Setup
Setting
TFSW = RFSW = 1
INVRFS = INVTFS = 1
DTYPE = 00
SLEN = 1111
ISCLK = 0
TFSR = RFSR = 1
IRFS = 0
ITFS = 1
The connection diagram is shown in Figure 29. The ADSP-218x
has the TFS0 and RFS0 of the SPORT0 and the RFS1 of SPORT1
tied together. TFS0 is set as an output, and both RFS0 and RFS1
are set as inputs. The DSP operates in alternate framing mode,
and the SPORT control register is set up as described in
Table 13 and Table 14. The frame synchronization signal
generated on the TFS is tied to CS .
OUT
B of the AD7366/AD7367 connected to both serial ports
Description
Alternate framing
Active low frame signal
Right justify data
16-bit data-word (or can be set to 1101
for 14-bit data-word)
Internal serial clock
Frame every word
Description
Alternate framing
Active low frame signal
Right justify data
16-bit data-word (or can be set to 1101
for 14-bit data-word)
External serial clock
Frame every word
OUT
A and
DRIVE
Rev. 0 | Page 24 of 28
The AD7366/AD7367 BUSY line provides an interrupt to
the ADSP-218x when the conversion is complete. The conver-
sion results can then be read from the AD7366/AD7367 using
a read operation. When an interrupt is received on IRQ from
the BUSY signal, a value is transmitted with TFS/DT (ADC
control word). The TFS is used to control the RFS and, hence,
the reading of data.
AD7366/AD7367 TO ADSP-BF53x
The ADSP-BF53x family of DSPs interfaces directly to the
AD7366/AD7367 without any glue logic required. The avail-
ability of secondary receive registers on the serial ports of the
Blackfin® DSPs means only one serial port is necessary to read
from both D
shows both D
nected to Serial Port 0 of the ADSP-BF53x. The SPORT0
Receive Configuration 1 register and SPORT0 Receive
Configuration 2 register should be set up as outlined in
Table 13 and Table 14.
*ADDITIONAL PINS OMITTED FOR CLARITY.
*ADDITIONAL PINS OMITTED FOR CLARITY.
Figure 30. Interfacing the AD7366/AD7367 to the ADSP-BF53x
Figure 29. Interfacing the AD7366/AD7367 to the ADSP-218x
AD7367*
AD7367*
AD7366/
AD7366/
OUT
OUT
CNVST
CNVST
D
V
D
D
V
D
A and D
BUSY
SCLK
BUSY
SCLK
DRIVE
DRIVE
OUT
OUT
OUT
OUT
A and D
CS
CS
B
A
B
A
OUT
OUT
(SECONDARY)
B pins simultaneously. Figure 30
(PRIMARY)
B of the AD7366/AD7367 con-
DEVICE A
DEVICE B
SERIAL
SERIAL
SCLK0
SCLK1
TFS0
RFS0
RFS1
DR0
DR1
IRQ
FLO
DR0PRI
RCLK0
RFS0
RXINTS
PF
DR0SEC
SPORT0
ADSP-BF53x*
N
ADSP-218x*
V
V
DD
DD