M48T201V-70MH1 STMICROELECTRONICS [STMicroelectronics], M48T201V-70MH1 Datasheet - Page 7

• Manufacturer Part Number: M48T201V-70MH1
• Description: 3.3V-5V TIMEKEEPER CONTROLLER
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

OPERATION
Automatic backup and write protection for an ex-
ternal SRAM is provided through V
G
specifications, for both the SUPERVISOR chip
and external SRAM chosen, are similar.) The
SNAPHAT
is used to retain the RTC and RAM data in the ab-
sence of V
chip enable output to RAM (E
enable output to RAM (G
ing power transients to prevent data corruption.
The date is automatically adjusted for months with
less than 31 days and corrects for leap years (valid
until 2100). The internal watchdog timer provides
programmable alarm windows.
The nine clock bytes (7FFFFh-7FFF9h and
7FFF1h) are not the actual clock counters, they
are memory locations consisting of BiPORT™
READ/WRITE memory cells within the static RAM
array. Clock circuitry updates the clock bytes with
current information once per second. The informa-
tion can be accessed by the user in the same man-
ner as any other location in the static memory
array. Byte 7FFF8h is the clock control register.
This byte controls user access to the clock infor-
mation and also stores the clock calibration set-
ting.
Byte 7FFF7h contains the watchdog timer setting.
The watchdog timer can generate either a reset or
an interrupt, depending on the state of the Watch-
dog Steering Bit (WDS). Bytes 7FFF6h-7FFF2h
include bits that, when programmed, provide for
clock alarm functionality. Alarms are activated
when the register content matches the month,
Table 2. Operating Modes
Note: X = V
CON
Deselect
Deselect
Deselect
WRITE
READ
READ
Mode
1. See
pins. (Users are urged to insure that voltage
IH
®
Table 14., page 27
or V
CC
containing the lithium energy source
IL
power through the V
; V
SO
V
SO
= Battery Back-up Switchover Voltage
4.5V to 5.5V
3.0V to 3.6V
to V
V
V
for details.
CON
PFD
or
SO
CC
(1)
) are controlled dur-
(min)
CON
) and the output
(1)
OUT
OUT
, E
CON
pin. The
V
V
V
V
E
X
X
, and
IH
IL
IL
IL
date, hours, minutes, and seconds of the clock
registers. Byte 7FFF1h contains century informa-
tion. Byte 7FFF0h contains additional flag informa-
tion pertaining to the watchdog timer, the alarm
condition, the battery status and square wave out-
put operation. 4 bits are included within this regis-
ter (RS0-RS3) that are used to program the
Square Wave Output Frequency (see
7., page
Power-Fail Detect circuit. This control circuitry
constantly monitors the supply voltage for an out
of tolerance condition. When V
ance, the circuit write protects the TIMEKEEPER
register data and external SRAM, providing data
security in the midst of unpredictable system oper-
ation. As V
Switchover Voltage (V
tomatically switches to the battery, maintaining
data and clock operation until valid power is re-
stored.
Address Decoding
The M48T201Y/V accommodates 19 address
lines (A0-A18) which allow direct connection of up
to 512K bytes of static RAM. Regardless of SRAM
density used, timekeeping, watchdog, alarm, cen-
tury, flag, and control registers are located in the
upper RAM locations. All TIMEKEEPER registers
reside in the upper RAM locations without conflict
by inhibiting the G
during clock access. The RAM's physical locations
are transparent to the user and the memory map
looks continuous from the first clock address to the
upper most attached RAM addresses.
V
V
G
X
X
X
X
IH
IL
18). The M48T201Y/V also has its own
V
V
V
W
CC
X
X
X
IH
IH
IL
falls below the Battery Back-up
CON
DQ7-DQ0
High-Z
High-Z
High-Z
High-Z
D
SO
(output enable RAM) signal
D
M48T201Y, M48T201V
OUT
IN
), the control circuitry au-
CC
Battery Back-Up
CMOS Standby
is out of toler-
Standby
Power
Active
Active
Active
Table
7/33
®