PCA85232DA NXP [NXP Semiconductors], PCA85232DA Datasheet - Page 23

• Manufacturer Part Number: PCA85232DA
• Description: LCD driver for low multiplex rates
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
PCA85232
Product data sheet
7.16.2 System configuration
7.16.3 Acknowledge
A device generating a message is a transmitter; a device receiving a message is the
receiver. The device that controls the message is the master and the devices which are
controlled by the master are the slaves. The system configuration is shown in
The number of data bytes transferred between the START and STOP conditions from
transmitter to receiver is unlimited. Each byte of eight bits is followed by an acknowledge
cycle.
Acknowledgement on the I
Fig 15. System configuration
Fig 16. Acknowledgement on the I
•
•
•
•
A slave receiver which is addressed must generate an acknowledge after the
reception of each byte.
Also a master receiver must generate an acknowledge after the reception of each
byte that has been clocked out of the slave transmitter.
The device that acknowledges must pull-down the SDA line during the acknowledge
clock pulse, so that the SDA line is stable LOW during the HIGH period of the
acknowledge related clock pulse (set-up and hold times must be taken into
consideration).
A master receiver must signal an end of data to the transmitter by not generating an
acknowledge on the last byte that has been clocked out of the slave. In this event the
transmitter must leave the data line HIGH to enable the master to generate a STOP
condition.
SCL
SDA
by transmitter
data output
by receiver
data output
TRANSMITTER/
SCL from
RECEIVER
master
MASTER
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condition
START
Rev. 1 — 8 December 2010
S
RECEIVER
2
C-bus is shown in
SLAVE
1
2
C-bus
TRANSMITTER/
RECEIVER
SLAVE
Figure
2
LCD driver for low multiplex rates
16.
TRANSMITTER
MASTER
not acknowledge
acknowledge
8
PCA85232
acknowledgement
clock pulse for
TRANSMITTER/
© NXP B.V. 2010. All rights reserved.
RECEIVER
MASTER
9
mbc602
Figure
mga807
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15.