PCF2114AU/10 PHILIPS [NXP Semiconductors], PCF2114AU/10 Datasheet - Page 7

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PCF2114AU/10

Manufacturer Part Number
PCF2114AU/10
Description
LCD controller/drivers
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
Philips Semiconductors
7
7.1
RS selects the register to be accessed for read and write
when the device is controlled by the parallel interface.
RS = logic 0 selects the instruction register for write and
the Busy Flag and Address Counter for read. RS = logic 1
selects the data register for both read and write. There is
an internal pull-up on pin RS.
7.2
R/W selects either the read (R/W = logic 1) or write
(R/W = logic 0) operation when control is by the parallel
interface. There is an internal pull-up on this pin.
7.3
The E pin is set HIGH to signal the start of a read or write
operation when the device is controlled by the parallel
interface. Data is clocked in or out of the chip on the
negative edge of the clock. Note that this pin must be tied
to logic 0 (V
7.4
The bidirectional, 3-state data bus transfers data between
the system controller and the PCF2116. DB7 may be used
as the Busy Flag, signalling that internal operations are not
yet completed. In 4-bit operations the 4 higher order lines
DB4 to DB7 are used; DB0 to DB3 must be left open
circuit. There is an internal pull-up on each of the data
lines. Note that these pins must be left open circuit when
I
7.5
These pins output the data for pairs of columns.
This arrangement permits optimized chip-on-glass (COG)
layout for 4-line by 12 characters.
7.6
These pins output the row select waveforms to the left and
right halves of the display.
7.7
Negative power supply for the liquid crystal display.
This may be generated on-chip or supplied externally.
7.8
The input level at this pin determines the generated V
output voltage.
1997 Apr 07
2
C-bus control is used.
LCD controller/drivers
PIN FUNCTIONS
RS: register select (parallel control)
R/W: read/write (parallel control)
E: data bus clock
DB0 to DB7: data bus
C1 to C60: column driver outputs
R1 to R32: row driver outputs
V
V
LCD
0
: V
SS
: LCD power supply
LCD
) when I
control input
2
C-bus control is used.
LCD
7
7.9
When the on-chip oscillator is used this pin must be
connected to V
at this pin.
7.10
Input for the I
7.11
Input/output for the I
7.12
The hardware sub-address line is used to program the
device sub-address for 2 different PCF2116s on the same
I
7.13
Must be connected to V
8
8.1
The on-chip voltage generator is controlled by bit G of the
‘Function set’ instruction and V
V
the system power supply. Its range is between V
V
switched off and an external voltage must be supplied to
pin V
When G = logic 1 the generator produces a negative
voltage at pin V
pin V
relationship:
Where:
When G = logic 0, the generated output voltage V
equal to V
When V
decoupled to V
must be selected to limit the maximum value of V
Figure 3 shows the two generator control characteristics.
2
C-bus.
0
DD
V
V
V
V
is a high-impedance input and draws no current from
OP
OP
LCD
OP
FUNCTIONAL DESCRIPTION (see Fig.1)
LCD
0
. The LCD operating voltage is given by the
1 V. When V
= 1.8V
= V
= V
OSC: oscillator
SCL: serial clock line
SDA: serial data line
SA0: address pin
T1: test pad
LCD supply voltage generator, PCF2114x and
PCF2116x
= V
LCD
. This may be more negative than V
0
DD
DD
0
(between V
is generated on-chip the V
2
DD
C-bus clock signal.
(0.8V
DD
DD
V
V
LCD
LCD
0
. An external clock signal, if used, is input
with a suitable capacitor. V
V
, controlled by the input voltage at
0
0
DD
2
is connected to V
C-bus data line.
)
SS
SS
. Not user accessible.
and V
0
PCF2116 family
.
DD
). In this instance:
Product specification
DD
LCD
the generator is
pin should be
SS
DD
.
OP
and V
SS
LCD
to 9 V.
and
is
0

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