HSP43168/883 INTERSIL [Intersil Corporation], HSP43168/883 Datasheet

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HSP43168/883

Manufacturer Part Number
HSP43168/883
Description
Dual FIR Filter
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
Dual FIR Filter
The HSP43168/883 Dual FIR Filter consists of two
independent 8-tap FIR filters. Each filter supports
decimation from 1 to 16 and provides on-board storage for
32 sets of coefficients. The Block Diagram shows two FIR
cells each fed by a separate coefficient bank and one of two
separate inputs. The outputs of the FIR cells are either
summed or multiplexed by the MUX/Adder. The compute
power in the FIR Cells can be configured to provide
quadrature filtering, complex filtering, 2-D convolution, 1-
D/2-D correlations, and interpolating/decimating filters.
The FIR cells take advantage of symmetry in FIR
coefficients by pre-adding data samples prior to
multiplication. This allows an 8-tap FIR to be implemented
using only 4 multipliers per filter cell. These cells can be
configured as either a single 16-tap FIR filter or dual 8-tap
FIR filters. Asymmetric filtering is also supported.
Decimation of up to 16 is provided to boost the effective number
of filter taps from 2 to 16 times. Further, the Decimation
Registers provide the delay necessary for fractional data
conversion and 2-D filtering with kernels to 16 x 16.
The flexibility of the dual is further enhanced by 32 sets of
user programmable coefficients. Coefficient selection may
be changed asynchronously from clock to clock. The ability
to toggle between coefficient sets further simplifies
applications such as polyphase or adaptive filtering.
The HSP43168 is a low power fully static design
implemented in an advanced CMOS process. The
configuration of the device is controlled through a standard
microprocessor interface.
Block Diagram
INB0 - 9/
OUT0 - 8
INA0 - 9
OEH
OEL
10
10
TM
CSEL0 - 4
1
CIN0 - 9
A0 - 8
WR
Data Sheet
MUX
10
9
COEFFICIENT
FIR CELL A
BANK A
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
9
1-888-INTERSIL or 321-724-7143
ADDER
MUX /
MUX
Features
• This Circuit is Processed in Accordance to MIL-STD-883
• Two Independent 8-Tap FIR Filters Configurable as a
• 10-Bit Data and Coefficients
• On-Board Storage for 32 Programmable
• Up To: 256 FIR Taps, 16 x 16 2-D Kernels, or
• Programmable Decimation to 16
• Programmable Rounding on Output
• Standard Microprocessor Interface
• 33MHz, 25.6MHz Versions
Applications
• Quadrature, Complex Filtering
• Correlation
• Image Processing
• PolyPhase Filtering
• Adaptive Filtering
Ordering Information
HSP43168GM-25/883
HSP43168GM-33/883
and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
Single 16-Tap FIR
Coefficient Sets
10 x 20-Bit Data and Coefficients
PART NUMBER
19
COEFFICIENT
FIR CELL B
BANK B
May 1999
|
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
Intersil (and design) is a trademark of Intersil Americas Inc.
RANGE (
-55 to 125
-55 to 125
TEMP.
CONFIGURATION
CONTROL /
HSP43168/883
o
C)
OUT9 - 27
84 Ld PGA
84 Ld PGA
PACKAGE
FN3177.3
G84.A
G84.A
PKG.
NO.

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HSP43168/883 Summary of contents

Page 1

... TM Data Sheet Dual FIR Filter The HSP43168/883 Dual FIR Filter consists of two independent 8-tap FIR filters. Each filter supports decimation from and provides on-board storage for 32 sets of coefficients. The Block Diagram shows two FIR cells each fed by a separate coefficient bank and one of two separate inputs ...

Page 2

... OEH GND F OUT27 OUT22 OUT26 G OUT24 OUT23 OUT25 H OUT21 OUT20 J OUT19 OUT17 V K OUT18 CC L GND OUT15 OUT14 OUT12 OUT10 OUT11 INB1 HSP43168/883 84 PIN PGA TOP VIEW INB1 INB4 OUT16 OUT13 V INB0 INB2 GND CC OUT9 OEL INB3 ...

Page 3

... MUX0-1 B9-10 CLK E9 OEL J6 OEH E11 ACCEN D10 3 HSP43168/883 TYPE V : +5V power supply pin. CC Ground. I Control/Coefficient Data Bus. Processor interface for loading control data and coefficients. CIN0 is the LSB. I Control/Coefficient Address Bus. Processor interface for addressing control and Coefficient Registers the LSB. ...

Page 4

... CCOP Current Functional Test FT NOTES: 2. Interchanging of force and sense conditions is permitted. 3. Operating Supply Current is proportional to frequency, typical rating is 11mA/MHz. 4. Tested as follows 1MHz, V (clock inputs) = 3.4V HSP43168/883 o Thermal Information C Thermal Resistance (Typical, Note 1) +0.5V Ceramic PGA Package . . . . . . . . . . . . Maximum Package Power Dissipation at 125 Ceramic PGA Package ...

Page 5

... Output load per test load circuit with < 1.5V Transition is measured at ±200mV from steady state voltage, Output loading per test load circuit Set-up time requirements for loading of data on CIN0-9 to guarantee recognition on the following clock. 5 HSP43168/883 GROUP A (NOTE 5) SUB- CONDITIONS GROUPS TEMPERATURE ( -55 ≤ 10, 11 -55 ≤ ...

Page 6

... Loading is as specified in the test load circuit with C CONFORMANCE GROUPS Initial Test Interim Test PDA Final Test Group A Groups C and D AC Test Load Circuit DUT *CL * INCLUDES STRAY AND JIG CAPACITANCE 6 HSP43168/883 CONDITIONS NOTES TEMPERATURE ( = Open -55 ≤ -55 ≤ -55 ≤ 40pF. ...

Page 7

... Waveforms CLK CSEL0-4, MUX0-1 SHFTEN, FWRD, RVRS, TXFR, INA0-9, INB0-9 OUT0- AWS A0-8 CIN0-15 OEL, OEH OUT0-27 7 HSP43168/883 ECH ECS WLCL AWH t t CWS CWH t CVCL 1.5V 1. 1.7V HIGH 1.3V IMPEDANCE OUTPUT ENABLE, DISABLE TIMING 2.0V 0. ...

Page 8

... NOTES: /2 (2.7V ±10%) used for outputs only 47KΩ (±20%) resistor connected to all pins except V = 5.5 ±0.5V 0.1µf (Min) capacitor between V and GND per position HSP43168/883 84 PIN PGA BOTTOM VIEW GND CSEL1 CSEL3 CSEL4 CIN8 ...

Page 9

... CIN3 D2 GND D10 ACCEN D11 CIN0 E2 CIN1 E3 CIN2 E9 CLK E10 GND E11 OEHB INA9 F3 INA8 9 HSP43168/883 PGA PIN BURN-IN SIGNAL F9 F9 F10 F12 F11 F11 F12 G3 F10 G9 F11 G10 F12 G11 GND F12 H10 F8 H11 F10 ...

Page 10

... Palm Bay Rd. Suite 100 Palm Bay, FL 32905 Irvine, CA 92618 TEL: (321) 724-7000 TEL: (949) 341-7000 FAX: (321) 724-7946 FAX: (949) 341-7123 10 HSP43168/883 GLASSIVATION: Type: Nitrox Thickness: 10kÅ WORST CASE CURRENT DENSITY: 1.93 x 105 A/cm2 EUROPE ASIA Intersil Europe Sarl Intersil Corporation Ave ...

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