TDA7402_07 STMICROELECTRONICS [STMicroelectronics], TDA7402_07 Datasheet - Page 26

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TDA7402_07

Manufacturer Part Number
TDA7402_07
Description
Car radio signal processor
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Audioprocessor part
4.10
4.10.1
26/71
Compander
Signal compression
A fully integrated signal compressor with programmable attack and decay times is present in
the A619 (see
The compander consists of a signal level detection, an A/D Converter plus adder and the
normal softstep volume stage. First of all the left and the right InGain-signal is rectified,
respectively, and the logarithm is build from the summed signal. The following low-pass
smooth the output-signal of the logarithm amplifier and improves the low frequency
suppression. The low pass output-voltage then is A/D converted an added to the current
volume-word defined by the I
input, the output of the ADC is 0. At lower levels the voltage is increasing with 1Bit/dB. It is
obvious that with this configuration and a 0.5dB-step volume stage the compression rate is
fixed to 2:1 (1dB less at the input leads to 0.5dB less at the output).
The internal reference level of the compander is programmable in three steps from 0.5V
to 2V
input signal exactly the programmed reference level after the InGain-stage. E.g. at a
configured reference-level of 0.5V
0.5V
signal-level). To adapt the external level to the internal reference level the programmable
attenuation in the differential stages and the InGain can be used.
Figure 17. Compander block diagram
Anti-clipping
In a second application the compander-circuit can be used for a anti-clipping or limiting
function. In this case one of the dedicated inputs (AM or MPin) is connected directly to the
clip-detector of the power-amplifier. if no clipping is detected, the open-collector output of
the power-amplifier is highohmic and the input-voltage of the rectifier is V
detector interprets this as a very small signal and reacts with the maximum programmed
compander gain. In the application this gain has to be compensated by decreasing the
RMS
RMS
MPIN
. For a proper behavior of the compression circuit it is mandatory to have at a 0dB
at 0dB source-signal (Usually the 0dB for CD is defined as the maximum possible
INR
INL
AM
Figure
SELECT
INPUT
ANTI-CLIP
17).
ENABLE
2
C bus. Assuming reference level or higher at the compander
CLPIN
RIN
LIN
RMS
the output of the InGain stage has to have also
CONTROL
VOLUME
IIC-BUS
+
8 Bit
INL
INR
STEREO FULL
WAVE RECTIFIER
SOFT STEP VOLUME
ADDER
AMPL
LOG
CLKREL
CLKATT
8 Bit
6 Bit
OUTR
OUTL
50Hz LOW-PASS
D00AU1147
D
REF
+
A
-
. The level
OUTL
OUTR
TDA7402
RMS

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