CY7C68300 CYPRESS [Cypress Semiconductor], CY7C68300 Datasheet - Page 14

• Manufacturer Part Number: CY7C68300
• Manufacturer: CYPRESS [Cypress Semiconductor]

Table 5-6. EEPROM Organization
Document #: 38-08011 Rev. *B
Configuration
0x00
0x01
0x02
0x03
0x04
0x05
Notes:
EEPROM
3.
4.
Address
At least one reset must be enabled. Do not set SRST to 0 and Skip Pin Reset to 1at the same time.
SRST Enable must be set in conjunction with Skip Pin Reset. Setting this bit causes the EZ-USB AT2 to bypass ARESET# during initialization. All reset events
except a power-on reset utilize SRST as the drive mechanism.
I
device signature (LSB)
I
device signature (MSB)
APM Value
ATA Initialization Timeout
ATA Command Designator
Reserved
BUSY Bit Delay
Short Packet Before Stall
SRST Enable
Skip Pin Reset
2
2
C-compatible memory
C-compatible memory
Field Name
LSB I
MSB I
ATA Device Automatic Power Management Value. If an
attached ATA device supports APM and this field contains
other than 0x00, the EZ-USB AT2 will issue a
SET_FEATURES command to Enable APM with this value
during the drive initialization process. Setting APM Value to
0x00 disables this functionality. This value is ignored with
ATAPI devices.
Time in 128-ms granularity before the EZ-USB AT2 stops
polling the ALT STAT register for reset complete and restarts
the reset process (0x80 = 16.4 seconds).
Value in the first byte of the CBW CB field that designates that
the CB is t o be decoded as vendor specific ATA commands
instead of the ATAPI command block. See section 4.0 for
more detail on how this byte is used.
Bits(7:4) Set to 0
Bit (3)
Enables a delay of up to 120 ms at each read of the DRQ bit
where the device data length does not match the host data
length. This allows the EZ-USB AT2 to work with most
devices that incorrectly clear the BUSY bit before a valid
status is present.
Bit (2)
Determines if a short packet is sent prior to the STALL of an
IN endpoint. The USB Mass Storage Class Bulk-Only Speci-
fication allows a device to send a short or zero-length IN
packet prior to returning a STALL handshake for certain
cases. Certain host controller drivers may require a short
packet prior to STALL.
1 = Force a short packet before STALL.
0 = Don’t force a short packet before STALL.
Bit (1)
Determines if the EZ-USB AT2 is to do a SRST reset during
drive initialization.
1 = Perform SRST during initialization.
0 = Don’t perform SRST during initialization.
Bit (0)
Skip ATA_NRESET assertion.
0 = Allow ARESET# assertion for all resets.
1 = Disable ARESET# assertion except for power-on reset
cycles.
2
2
C-compatible memory device signature byte.
C-compatible memory device signature byte.
[3]
Field Description
[4]
Required
Contents
0x4D
0x4D
CY7C68300
Page 14 of 26
Suggested
Contents
0x00
0x80
0x24
0x07