CY7C68300 CYPRESS [Cypress Semiconductor], CY7C68300 Datasheet
CY7C68300
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CY7C68300 Summary of contents
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... CY7C68300 EZ-USB AT2™ USB 2.0 to ATA/ATAPI Bridge Document #: 38-08011 Rev. *B CY7C68300 Page ...
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... PACKAGE DIAGRAMS 12.0 PCB LAYOUT RECOMMENDATIONS ........................................................................................ 24 13.0 QUAD FLAT PACKAGE NO LEADS (QFN) PACKAGE DESIGN NOTES ................................ 24 14.0 OTHER DESIGN CONSIDERATIONS ......................................................................................... 25 14.1 Proper Power-up Sequence .................................................................................................... 25 14.2 IDE Removable Media Devices .............................................................................................. 25 14.3 Devices With Small Buffers ..................................................................................................... 25 14.4 USB Idle Mode ........................................................................................................................ 25 15.0 DISCLAIMERS, TRADEMARKS, AND COPYRIGHTS ............................................................... 25 Document #: 38-08011 Rev. *B CONTENTS ............................................................................................................. 23 CY7C68300 Page ...
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... Figure 13-2. Plot of the Solder Mask (White Area) ................................................................................ 25 Figure 13-3. X-ray Image of the Assembly ............................................................................................ 25 Table 5-1. Command Block Wrapper ................................................................................................... 11 Table 5-2. Example CfgCB ................................................................................................................... 11 Table 5-3. Example MfgCB ................................................................................................................... 12 Table 5-4. Mfg_load Data Format ......................................................................................................... 12 Table 5-5. Mfg_read Data Format ........................................................................................................ 13 Table 5-6. EEPROM Organization ........................................................................................................ 14 Document #: 38-08011 Rev. *B LIST OF FIGURES LIST OF TABLES CY7C68300 Page ...
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... ATA interface in order to allow sharing of the bus with another controller (e.g., an IEEE-1394 to ATA bridge chip) • Support for board-level manufacturing test via USB interface • 3.3V operation for self-powered devices • 56-pin SSOP and 56-pin QFN packages. Document #: 38-08011 Rev. *B CY7C68300 Page ...
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... SCL SDA 24 MHz PLL XTAL VBUS D+ USB 2.0 XCVR D- Document #: 38-08011 Rev. *B I2C-Compatible Bus Controller AT2 Internal Logic CY Smart USB 4kByte FIFO FS/HS Engine Figure 1-1. Block Diagram CY7C68300 ATA Interface Control Signals Control ATA 16 Bit ATA Data Interface Logic Data Page ...
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... AVcc XTALOUT VBUS_PWR_VALID XTALIN AGND EZ-USB AT2 Vcc CY7C68300 DPLUS DMINUS GND Vcc GND PU10K RESERVED SCL SDA Vcc DD0 DD1 DD2 DD3 Figure 2-1. 56-pin SSOP CY7C68300 56 DD12 DD11 55 54 DD10 53 DD9 52 DD8 51 ATA_EN Vcc 50 49 RESET# 48 GND 47 ARESET CS1# ...
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... DMARQ 2 AVCC 3 XTALOUT 4 XTALIN 5 AGND 6 VCC 7 DPLUS 8 DMINUS 9 GND 10 VCC 11 GND 12 PU10K 13 RESERVED 14 Document #: 38-08011 Rev. *B EZ-USB AT2 CY7C68300 56-pin QFN Figure 2-2. 56-pin QFN CY7C68300 42 RESET# 41 GND 40 ARESET# 39 VBUS_PWR_VALID 38 CS1# 37 CS0# 36 DA2 35 DA1 34 DA0 33 INTRQ 32 VCC 31 DMACK# 30 DIOR# 29 DIOW# Page ...
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... ATA Data bit 2. Hi-Z ATA Data bit 3. Hi-Z ATA Data bit 4. Hi-Z ATA Data bit 5. Hi-Z ATA Data bit 6. Hi-Z ATA Data bit 7. Ground Connect to 3.3V power source. CC Ground. CY7C68300 Pin Description . Connect the V through the shortest path C-compatible interface (see 2.3.2). 2 C-compatible interface (see 2.3.2). Page ...
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... Disabling ATA_EN three- states (High-Z) the ATA interface and halts the ATA interface state machine logic. Hi-Z ATA Data bit 8. Hi-Z ATA Data bit 9. Hi-Z ATA Data bit 10. Hi-Z ATA Data bit 11. Hi-Z ATA Data bit 12. CY7C68300 Pin Description through 2.2k CC Page ...
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... USB Mass Storage Class Bulk Only Transport Specification, http://www.usb.org/developers/data/devclass/ usbmassbulk_10.pdf. Document #: 38-08011 Rev crys ta l Figure 2-3. XTALIN, XTALOUT Diagram Figure 2-4. Typical Reset Circuit CY7C68300 through a 100k resistor, and to GND through CC Page ...
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... Document #: 38-08011 Rev C-compatible port for an EEPROM whose first two bytes are both DCBWSignature dCBWTag dCBWDataTransferLength bwCBWFLAGS Obsolete Reserved (0) Reserved (0) CBWCB (CfgCB or MfgCB CY7C68300 Reserved (0) bCBWLUN bCBWCBLength Bits Page ...
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... Bits Test/Three-state Control Function CY7C68300 ...
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... USB compliance. See subsection 5.1 for details on how to use vendor-specific ATAPI commands to read and program the EEPROM. The serial EEPROM must be hard-wired to address 0x04. This means that A0 and A1 of the serial EEPROM must be tied to ground and that A2 must be tied to 3.3V. Document #: 38-08011 Rev. *B Test/Three-state Control Function CY7C68300 Page ...
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... Perform SRST during initialization Don’t perform SRST during initialization. Bit (0) [4] Skip ATA_NRESET assertion Allow ARESET# assertion for all resets Disable ARESET# assertion except for power-on reset cycles. CY7C68300 Required Suggested Contents Contents 0x4D 0x4D 0x00 0x80 0x24 ...
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... Must be set to 0x00. Must be set to 0x00. Must be set to 0x00. Must be set to 0x00. Must be set to 0x00. Length of device descriptor in bytes. Descriptor type. USB Specification release number in BCD. Device class. Device subclass. CY7C68300 Required Suggested Contents Contents 0xD4 0x03 0x00 0x00 0x00 0x00 ...
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... The value to use as an argument to Set Configuration to select the configuration. This value must be set to 0x01. Index to the configuration string. This entry must equal half of the address value where the string starts or 0x00 if the string does not exist. CY7C68300 Required Suggested Contents Contents ...
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... Length of configuration descriptor in bytes. Descriptor type. Number of bytes returned in this configuration. This includes the configuration descriptor plus all the interface and endpoint descriptors. Number of interfaces supported. The value to use as an argument to Set Configuration to select the configuration. CY7C68300 Required Suggested Contents Contents 0xC0 0x00 0x09 ...
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... Length of this descriptor in bytes. Endpoint descriptor type. This endpoint, endpoint number 8. This is a bulk endpoint. Max data transfer size. Does not apply to FS bulk endpoints. Must be set to 0. LANGID string descriptor length in bytes. Descriptor type. CY7C68300 Required Suggested Contents Contents 0x00 0xC0 0x00 ...
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... Unicode character. (“NUL”) Unicode character. (“NUL”) Unicode character. (“NUL”) Unicode character. (“NUL”) Unicode character. (“NUL”) Unicode character. (“NUL”) CY7C68300 Required Suggested Contents Contents 0x09 0x04 0x2C 0x03 “C” 0x43 0x00 “y” 0x79 0x00 “ ...
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... Unicode character. (“NUL”) Unicode character. (“NUL”) Unicode character. (“NUL”) Unicode character. (“NUL”) Unicode character. (“NUL”) Unicode character. (“NUL”) CY7C68300 Required Suggested Contents Contents “o” 0x6F 0x00 “r” 0x72 0x00 0x2C 0x03 “U” 0x55 0x00 “ ...
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... Unicode character. (“NUL”) Unicode character. (“NUL”) Unicode character. (“NUL”) Unicode character. (“NUL”) Unicode character. (“NUL”) Unicode character. (“NUL”) CY7C68300 Required Suggested Contents Contents “i” 0x69 0x00 “c” 0x63 0x00 “e” 0x65 0x00 0x22 0x03 “ ...
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... Field Description Amount of unused ROM space will vary depending on strings. [5] Conditions 0 < V < OUT I = –4 mA OUT All but D+/D– Only D+/D– USB High Speed USB Full Speed CY7C68300 Required Suggested Contents Contents 0xFF + 0.5V CC Min. Typ. Max. Unit 3.0 3.3 3 5.25 V – ...
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... CY7C68300 56 SSOP CY7C68300 56 QFN CY4615 EZ-USB AT2 Reference Design Kit 11.0 Package Diagrams Figure 11-1. 56-lead Shrunk Small Outline Package 056 Figure 11-2. 56-lead Quad Flatpack No Lead ( mm) LF56 Document #: 38-08011 Rev. *B Package Type 56-lead QFN ( mm) CY7C68300 51-85062-*C 51-85144-*B Page ...
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... Figure 13 plot of the solder mask pattern and Figure 13-3 displays an X-Ray image of the assembly (darker areas indicate solder.) Document #: 38-08011 Rev. *B 0.017” dia Solder Mask Cu Fill Cu Fill 0.013” dia PCB Material This figure only shows the top three layers of the circuit board: Top Solder, PCB Dielectric, and the Ground Plane CY7C68300 Page ...
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... Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. Figure 13-3. X-ray Image of the Assembly 2 C system, provided that the system conforms to the I CY7C68300 2 C Standard Specification Page ...
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... Document History Page Description Title: CY7C68300 EZ-USB AT2™ USB 2.0 to ATA/ATAPI Bridge Document Number: 38-08011 Issue REV. ECN NO. Date ** 111608 05/15/02 *A 116660 08/30/02 *B 121518 12/17/02 Document #: 38-08011 Rev. *B Orig. of Change BHA New Data Sheet BHA Added new 56-pin Quad Flatpack No Lead package and pinout. ...