ADF4157 AD [Analog Devices], ADF4157 Datasheet - Page 12

• Manufacturer Part Number: ADF4157
• Description: High Resolution 6 GHz Fractional-N Frequency Synthesizer
• Manufacturer: AD [Analog Devices]

ADF4157
With R1[2, 1, 0] set to [0, 0, 1], the on-chip LSB FRAC register
is programmed as shown in Figure 18.
13-Bit LSB FRAC Value
These thirteen bits, along with Bits DB[14:3] in the INT/FRAC
register (R0), control what is loaded as the FRAC value into
the fractional interpolator. This is part of what determines
the overall feedback division factor. It is also used in Equation 1.
These 13 bits are the least significant bits of the 25-bit FRAC
LSB FRAC REGISTER (R1) MAP
DB31
0
RESERVED
DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0
0
0
*THE FRAC VALUE IS MADE UP OF THE 12-BIT MSB STORED IN
REGISTER 0, AND THE 13-BIT LSB REGISTER STORED IN
REGISTER 1. FRAC VALUE = 13-BIT LSB + 12-BIT MSB × 2
F25
F13
0
0
0
0
1
1
1
1
.
.
.
F12
F24
0
0
0
0
1
1
1
1
.
.
.
F11
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
F10
13-BIT LSB FRACTIONAL VALUE
F9
F14
0
0
1
1
0
0
1
1
.
.
.
F8
(FRAC)
F7
F13
0
1
0
1
0
1
0
1
.
.
.
F6
LSB FRACTIONAL VALUE
(FRAC)*
0
1
2
3
.
.
.
8188
8189
8190
8191
Figure 18. LSB FRAC Register (R1) Map
F5
F4
Rev. 0 | Page 12 of 20
F3
13
F2
.
F1
value, and Bits DB[14:3] in the INT/FRAC register are the most
significant bits. See the RF Synthesizer: A Worked Example
section for more information.
Reserved Bits
All reserved bits should be set to 0 for normal operation.
0
0
0
0
0
RESERVED
0
0
0
0
0
0
0
C3(0) C2(0) C1(1)
CONTROL
BITS